arm64: dts: st: add PCIe pinctrl entries in stm32mp25-pinctrl.dtsi

Add PCIe pinctrl entries in stm32mp25-pinctrl.dtsi
init: forces GPIO to low while probing so CLKREQ is low for
phy_init
default: restore the AFMUX after controller probe

Add Analog pins of PCIe to perform power cycle

Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
Link: https://lore.kernel.org/r/20250820075411.1178729-9-christian.bruel@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
index 5ac9e72478dddb82be0ef7432d7e728932b2f4d6..04e1606df12692ed7ccbe3a017ca5ea5b58f0e30 100644 (file)
--- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
@@ -133,6 +133,26 @@
                };
        };
 
+       pcie_pins_a: pcie-0 {
+               pins {
+                       pinmux = <STM32_PINMUX('J', 0, AF4)>;
+                       bias-disable;
+               };
+       };
+
+       pcie_init_pins_a: pcie-init-0 {
+               pins {
+                       pinmux = <STM32_PINMUX('J', 0, GPIO)>;
+                       output-low;
+               };
+       };
+
+       pcie_sleep_pins_a: pcie-sleep-0 {
+               pins {
+                       pinmux = <STM32_PINMUX('J', 0, ANALOG)>;
+               };
+       };
+
        pwm3_pins_a: pwm3-0 {
                pins {
                        pinmux = <STM32_PINMUX('B', 15, AF7)>; /* TIM3_CH2 */