--- /dev/null
+From 3efb7aeefef62886be0dde83f6340d1a1bfcb5f6 Mon Sep 17 00:00:00 2001
+From: Pawel Dembicki <paweldembicki@gmail.com>
+Date: Fri, 31 Oct 2025 22:46:05 +0100
+Subject: [PATCH] layerscape: dts: ls1012a-frdm: add GPIO hog for PHY reset
+
+On LS1012A-FRDM both PHY reset pins are tied to GPIO1_23 (active-low).
+Older kernels preserved the U-Boot-configured level, but since 6.12 the
+pin may default to an undefined state early in boot, leaving the PHYs in
+reset and breaking detection.
+
+Add a GPIO hog on gpio1[23], configured as output-high, to keep the
+reset line deasserted from early boot.
+
+Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
+---
+ arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
+@@ -87,6 +87,15 @@
+ status = "okay";
+ };
+
++&gpio0 {
++ phy-reset-hog {
++ gpio-hog;
++ gpios = <23 1>;
++ output-low;
++ line-name = "phy-reset";
++ };
++};
++
+ &i2c0 {
+ status = "okay";
+