PCI: al: Check IORESOURCE_BUS existence during probe

[ Upstream commit a9927c2cac6e9831361e43a14d91277818154e6a ]

If IORESOURCE_BUS is not provided in Device Tree it will be fabricated in
of_pci_parse_bus_range(), so NULL pointer dereference should not happen
here.

But that's hard to verify, so check for NULL anyway.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Link: https://lore.kernel.org/linux-pci/20240503125705.46055-1-amishin@t-argos.ru
Suggested-by: Bjorn Helgaas <helgaas@kernel.org>
Signed-off-by: Aleksandr Mishin <amishin@t-argos.ru>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/pci/controller/dwc/pcie-al.c b/drivers/pci/controller/dwc/pcie-al.c
index f973fbca90cf7ce4e00d84b02ebd66f3da047dbf..ac772fb11aa73d0a86bb0a51c5743ac981ab4214 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-al.c
+++ b/drivers/pci/controller/dwc/pcie-al.c
@@ -250,18 +250,24 @@ static struct pci_ops al_child_pci_ops = {
        .write = pci_generic_config_write,
 };
 
-static void al_pcie_config_prepare(struct al_pcie *pcie)
+static int al_pcie_config_prepare(struct al_pcie *pcie)
 {
        struct al_pcie_target_bus_cfg *target_bus_cfg;
        struct pcie_port *pp = &pcie->pci->pp;
        unsigned int ecam_bus_mask;
+       struct resource_entry *ft;
        u32 cfg_control_offset;
+       struct resource *bus;
        u8 subordinate_bus;
        u8 secondary_bus;
        u32 cfg_control;
        u32 reg;
-       struct resource *bus = resource_list_first_type(&pp->bridge->windows, IORESOURCE_BUS)->res;
 
+       ft = resource_list_first_type(&pp->bridge->windows, IORESOURCE_BUS);
+       if (!ft)
+               return -ENODEV;
+
+       bus = ft->res;
        target_bus_cfg = &pcie->target_bus_cfg;
 
        ecam_bus_mask = (pcie->ecam_size >> 20) - 1;
@@ -295,6 +301,8 @@ static void al_pcie_config_prepare(struct al_pcie *pcie)
               FIELD_PREP(CFG_CONTROL_SEC_BUS_MASK, secondary_bus);
 
        al_pcie_controller_writel(pcie, cfg_control_offset, reg);
+
+       return 0;
 }
 
 static int al_pcie_host_init(struct pcie_port *pp)
@@ -313,7 +321,9 @@ static int al_pcie_host_init(struct pcie_port *pp)
        if (rc)
                return rc;
 
-       al_pcie_config_prepare(pcie);
+       rc = al_pcie_config_prepare(pcie);
+       if (rc)
+               return rc;
 
        return 0;
 }