drm/i915/wm: use generic poll_timeout_us() instead of wait_for()

Prefer generic poll helpers over i915 custom helpers.

The functional change is losing the exponentially growing sleep of
wait_for(), which used to be 10, 20, 40, ..., 640, and 1280 us.

Use an arbitrary constant 500 us sleep instead. The timeout remains at 3
ms.

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/52c80860ea7b98e84f2386ed6cdd761f03190b1e.1756383233.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 591acce2a4b181988fb6b160fa0911d6dd62cd1c..060aff7659946e13d1c73713e69f750e29ff5058 100644 (file)
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -3,6 +3,8 @@
  * Copyright © 2023 Intel Corporation
  */
 
+#include <linux/iopoll.h>
+
 #include "soc/intel_dram.h"
 
 #include "i915_drv.h"
@@ -112,6 +114,7 @@ static const struct cxsr_latency *pnv_get_cxsr_latency(struct intel_display *dis
 static void chv_set_memory_dvfs(struct intel_display *display, bool enable)
 {
        u32 val;
+       int ret;
 
        vlv_punit_get(display->drm);
 
@@ -124,8 +127,10 @@ static void chv_set_memory_dvfs(struct intel_display *display, bool enable)
        val |= FORCE_DDR_FREQ_REQ_ACK;
        vlv_punit_write(display->drm, PUNIT_REG_DDR_SETUP2, val);
 
-       if (wait_for((vlv_punit_read(display->drm, PUNIT_REG_DDR_SETUP2) &
-                     FORCE_DDR_FREQ_REQ_ACK) == 0, 3))
+       ret = poll_timeout_us(val = vlv_punit_read(display->drm, PUNIT_REG_DDR_SETUP2),
+                             (val & FORCE_DDR_FREQ_REQ_ACK) == 0,
+                             500, 3000, false);
+       if (ret)
                drm_err(display->drm,
                        "timed out waiting for Punit DDR DVFS request\n");
 
@@ -3905,6 +3910,7 @@ static void vlv_wm_get_hw_state(struct intel_display *display)
        struct vlv_wm_values *wm = &display->wm.vlv;
        struct intel_crtc *crtc;
        u32 val;
+       int ret;
 
        vlv_read_wm_values(display, wm);
 
@@ -3931,8 +3937,10 @@ static void vlv_wm_get_hw_state(struct intel_display *display)
                val |= FORCE_DDR_FREQ_REQ_ACK;
                vlv_punit_write(display->drm, PUNIT_REG_DDR_SETUP2, val);
 
-               if (wait_for((vlv_punit_read(display->drm, PUNIT_REG_DDR_SETUP2) &
-                             FORCE_DDR_FREQ_REQ_ACK) == 0, 3)) {
+               ret = poll_timeout_us(val = vlv_punit_read(display->drm, PUNIT_REG_DDR_SETUP2),
+                                     (val & FORCE_DDR_FREQ_REQ_ACK) == 0,
+                                     500, 3000, false);
+               if (ret) {
                        drm_dbg_kms(display->drm,
                                    "Punit not acking DDR DVFS request, "
                                    "assuming DDR DVFS is disabled\n");