]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
rockchip: rk3576: Add SPI Flash boot support
authorJonas Karlman <jonas@kwiboo.se>
Sun, 19 Oct 2025 15:47:18 +0000 (15:47 +0000)
committerTom Rini <trini@konsulko.com>
Sun, 2 Nov 2025 18:14:09 +0000 (12:14 -0600)
The bootsource ids reported by BootROM of RK3576 for SPI NOR and USB
differs slightly compared to prior SoCs:

- Booting from sfc0 (ROCK 4D) report the normal bootsource id 0x3.
- Booting from sfc1 M1 (NanoPi M5) report a new bootsource id 0x23.
- Booting from sfc1 M0 has not been tested (no board using this config).
- Booting from USB report a new bootsource id 0x81.

Add a RK3576 specific read_brom_bootsource_id() function to help decode
the new bootsource id values and the required boot_devices mapping of
sfc0 and sfc1 to help support booting from SPI flash on RK3576.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/dts/rk3576-u-boot.dtsi
arch/arm/mach-rockchip/rk3576/rk3576.c

index fb5a107f47d9264fa8b62b6518dc3cec3951323a..dc3771b556a3b0cbe546e46f0d41ca85c44c78f6 100644 (file)
@@ -6,6 +6,11 @@
 #include "rockchip-u-boot.dtsi"
 
 / {
+       aliases {
+               spi5 = &sfc0;
+               spi6 = &sfc1;
+       };
+
        chosen {
                u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
        };
        };
 };
 
+#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
+&binman {
+       simple-bin-spi {
+               mkimage {
+                       args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
+                       offset = <0x8000>;
+               };
+       };
+};
+#endif
+
 &cru {
        bootph-all;
 };
        bootph-some-ram;
 };
 
+&fspi0_csn0 {
+       bootph-pre-ram;
+       bootph-some-ram;
+};
+
+&fspi0_pins {
+       bootph-pre-ram;
+       bootph-some-ram;
+};
+
+&fspi1m1_csn0 {
+       bootph-pre-ram;
+       bootph-some-ram;
+};
+
+&fspi1m1_pins {
+       bootph-pre-ram;
+       bootph-some-ram;
+};
+
 &ioc_grf {
        bootph-all;
 };
        bootph-some-ram;
 };
 
+&sfc0 {
+       bootph-some-ram;
+       u-boot,spl-sfc-no-dma;
+};
+
+&sfc1 {
+       bootph-some-ram;
+       u-boot,spl-sfc-no-dma;
+};
+
 &sys_grf {
        bootph-all;
 };
index a6c2fbdc4840b8a4fa282a6855dca5452b57a8ad..a1e8a7572fa4fad77a13870f01b15ce3aeca0a06 100644 (file)
 #define USB_GRF_BASE           0x2601E000
 #define USB3OTG0_CON1          0x0030
 
+enum {
+       BROM_BOOTSOURCE_FSPI0 = 3,
+       BROM_BOOTSOURCE_FSPI1_M1 = 6,
+};
+
 const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
        [BROM_BOOTSOURCE_EMMC] = "/soc/mmc@2a330000",
+       [BROM_BOOTSOURCE_FSPI0] = "/soc/spi@2a340000/flash@0",
+       [BROM_BOOTSOURCE_FSPI1_M1] = "/soc/spi@2a300000/flash@0",
        [BROM_BOOTSOURCE_SD] = "/soc/mmc@2a310000",
 };
 
@@ -85,6 +92,24 @@ void board_debug_uart_init(void)
 {
 }
 
+u32 read_brom_bootsource_id(void)
+{
+       u32 bootsource_id = readl(BROM_BOOTSOURCE_ID_ADDR);
+
+       /* Re-map the raw value read from reg to a redefined or existing
+        * BROM_BOOTSOURCE enum value to avoid having to create a larger
+        * boot_devices table.
+        */
+       if (bootsource_id == 0x23)
+               return BROM_BOOTSOURCE_FSPI1_M1;
+       else if (bootsource_id == 0x81)
+               return BROM_BOOTSOURCE_USB;
+       else if (bootsource_id > BROM_LAST_BOOTSOURCE)
+               log_debug("Unknown bootsource %x\n", bootsource_id);
+
+       return bootsource_id;
+}
+
 #define HP_TIMER_BASE                  CONFIG_ROCKCHIP_STIMER_BASE
 #define HP_CTRL_REG                    0x04
 #define TIMER_EN                       BIT(0)