drm/amd/display: Support possibly NULL link for should_use_dmub_lock

[Why]
It's possible to have a stream enabled without a link or link encoder.

There are cases where we'd still like to interlock the driver
programming from firmware programming to ensure that we don't put the
hardware in an undefined (or error) state if two programming sequences
are simultaneously executed on the same hardware blocks.

[How]
Add an explicit DC parameter to should_use_dmub_lock().

Make pointers to should_use_dmub_lock() const since it's a checker
function that shouldn't modify state.

Update the callsites to pass in DC explicitly.

Check that the link is non-NULL before deferencing and performing link
based checks.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 5f2d5638c81919c62866ae7dcaf15419b8e29c93..3f5ec076da1c06a4a31cbdca7daa4aba22663d9d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -4149,7 +4149,7 @@ static void commit_planes_for_stream(struct dc *dc,
        if ((update_type != UPDATE_TYPE_FAST) && stream->update_flags.bits.dsc_changed)
                if (top_pipe_to_program &&
                        top_pipe_to_program->stream_res.tg->funcs->lock_doublebuffer_enable) {
-                       if (should_use_dmub_lock(stream->link)) {
+                       if (should_use_dmub_lock(dc, stream->link)) {
                                union dmub_hw_lock_flags hw_locks = { 0 };
                                struct dmub_hw_lock_inst_flags inst_flags = { 0 };
 
@@ -4419,7 +4419,7 @@ static void commit_planes_for_stream(struct dc *dc,
                                top_pipe_to_program->stream_res.tg,
                                CRTC_STATE_VACTIVE);
 
-                       if (should_use_dmub_lock(stream->link)) {
+                       if (should_use_dmub_lock(dc, stream->link)) {
                                union dmub_hw_lock_flags hw_locks = { 0 };
                                struct dmub_hw_lock_inst_flags inst_flags = { 0 };
 

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c b/drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c
index d37ecfdde4f1bc06d833b8be09853420dee1181b..17c30c5b16794d111fd683ddaae408f030861e1d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c
@@ -61,27 +61,30 @@ void dmub_hw_lock_mgr_inbox0_cmd(struct dc_dmub_srv *dmub_srv,
        dc_dmub_srv_wait_for_inbox0_ack(dmub_srv);
 }
 
-bool should_use_dmub_lock(struct dc_link *link)
+bool should_use_dmub_lock(const struct dc *dc, const struct dc_link *link)
 {
        /* ASIC doesn't support DMUB */
-       if (!link->ctx->dmub_srv)
+       if (!dc->ctx->dmub_srv)
                return false;
 
-       if (link->psr_settings.psr_version == DC_PSR_VERSION_SU_1)
-               return true;
+       if (link) {
 
-       if (link->replay_settings.replay_feature_enabled)
-               return true;
+               if (link->psr_settings.psr_version == DC_PSR_VERSION_SU_1)
+                       return true;
+
+               if (link->replay_settings.replay_feature_enabled)
+                       return true;
 
-       /* only use HW lock for PSR1 on single eDP */
-       if (link->psr_settings.psr_version == DC_PSR_VERSION_1) {
-               struct dc_link *edp_links[MAX_NUM_EDP];
-               int edp_num;
+                       /* only use HW lock for PSR1 on single eDP */
+               if (link->psr_settings.psr_version == DC_PSR_VERSION_1) {
+                       struct dc_link *edp_links[MAX_NUM_EDP];
+                       int edp_num;
 
-               dc_get_edp_links(link->dc, edp_links, &edp_num);
+                       dc_get_edp_links(dc, edp_links, &edp_num);
 
-               if (edp_num == 1)
-                       return true;
+                       if (edp_num == 1)
+                               return true;
+               }
        }
 
        return false;

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.h b/drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.h
index 5a72b168fb4ae311d5c8fc92e2b04c2ae1e29f1b..6e8863877686939126b771238e08ccd4cc67c1f0 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.h
@@ -37,6 +37,6 @@ void dmub_hw_lock_mgr_cmd(struct dc_dmub_srv *dmub_srv,
 void dmub_hw_lock_mgr_inbox0_cmd(struct dc_dmub_srv *dmub_srv,
                union dmub_inbox0_cmd_lock_hw hw_lock_cmd);
 
-bool should_use_dmub_lock(struct dc_link *link);
+bool should_use_dmub_lock(const struct dc *dc, const struct dc_link *link);
 
 #endif /*_DMUB_HW_LOCK_MGR_H_ */

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
index e9fe97f0c4ea8ce0f4b31529a37cd6ddf8b62bd6..cb915abac15a6af39aaf67b6b9d0e6952e7deecd 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
@@ -2245,7 +2245,7 @@ void dcn10_cursor_lock(struct dc *dc, struct pipe_ctx *pipe, bool lock)
        if (lock)
                delay_cursor_until_vupdate(dc, pipe);
 
-       if (pipe->stream && should_use_dmub_lock(pipe->stream->link)) {
+       if (pipe->stream && should_use_dmub_lock(dc, pipe->stream->link)) {
                union dmub_hw_lock_flags hw_locks = { 0 };
                struct dmub_hw_lock_inst_flags inst_flags = { 0 };
 

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
index 9477c9f9e1963a737228f9d682dc36b04c558345..650a1697557b245cb4c14e9a0e0fb45bd58f5706 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
@@ -1449,7 +1449,7 @@ void dcn20_pipe_control_lock(
                !flip_immediate)
            dcn20_setup_gsl_group_as_lock(dc, pipe, false);
 
-       if (pipe->stream && should_use_dmub_lock(pipe->stream->link)) {
+       if (pipe->stream && should_use_dmub_lock(dc, pipe->stream->link)) {
                union dmub_hw_lock_flags hw_locks = { 0 };
                struct dmub_hw_lock_inst_flags inst_flags = { 0 };
 

diff --git a/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c b/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
index 9e33bf937a692426c4a52b6d5d16970452d54ae3..3c8eb1510226cb42a992778de989bc7e7d2d9518 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
+++ b/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
@@ -876,7 +876,7 @@ bool dp_set_test_pattern(
                        return false;
 
                if (pipe_ctx->stream_res.tg->funcs->lock_doublebuffer_enable) {
-                       if (should_use_dmub_lock(pipe_ctx->stream->link)) {
+                       if (should_use_dmub_lock(pipe_ctx->stream->link->dc, pipe_ctx->stream->link)) {
                                union dmub_hw_lock_flags hw_locks = { 0 };
                                struct dmub_hw_lock_inst_flags inst_flags = { 0 };
 
@@ -924,7 +924,7 @@ bool dp_set_test_pattern(
                                CRTC_STATE_VACTIVE);
 
                if (pipe_ctx->stream_res.tg->funcs->lock_doublebuffer_disable) {
-                       if (should_use_dmub_lock(pipe_ctx->stream->link)) {
+                       if (should_use_dmub_lock(pipe_ctx->stream->link->dc, pipe_ctx->stream->link)) {
                                union dmub_hw_lock_flags hw_locks = { 0 };
                                struct dmub_hw_lock_inst_flags inst_flags = { 0 };