]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
imx943_evk: Enable ENETC1 and ENETC2
authorAlice Guo <alice.guo@nxp.com>
Tue, 28 Oct 2025 02:46:31 +0000 (10:46 +0800)
committerFabio Estevam <festevam@nabladev.com>
Tue, 4 Nov 2025 15:39:46 +0000 (12:39 -0300)
With this patch, both ENETC1 and ENETC2 are functional on the i.MX943
EVK board and can be used for networking.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
arch/arm/dts/imx943-evk-u-boot.dtsi
arch/arm/dts/imx943-u-boot.dtsi
configs/imx943_evk_defconfig

index 3995176f0907f4d8d51302924345263352aa88ff..528b3b02a3f166ae74f0de0dd1c68ac6c2671cff 100644 (file)
 
 #include "imx943-u-boot.dtsi"
 
+&enetc1 {
+       clocks = <&scmi_clk IMX94_CLK_MAC4>;
+       clock-names = "enet_ref_clk";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_eth3>;
+       phy-handle = <&ethphy5>;
+       phy-mode = "rgmii-id";
+       status = "okay";
+};
+
+&enetc2 {
+       clocks = <&scmi_clk IMX94_CLK_MAC5>;
+       clock-names = "enet_ref_clk";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_eth4>;
+       phy-handle = <&ethphy6>;
+       phy-mode = "rgmii-id";
+       status = "okay";
+};
+
+&lpi2c3 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lpi2c3>;
+       status = "okay";
+
+       pca9548_i2c3: i2c-mux@77 {
+               compatible = "nxp,pca9548";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x77>;
+
+               i2c@5 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <5>;
+
+                       pcal6416_i2c3_u171: gpio@21 {
+                               compatible = "nxp,pcal6416";
+                               reg = <0x21>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+
+                               ethphy2-on-hog {
+                                       gpio-hog;
+                                       gpios = <2 GPIO_ACTIVE_HIGH>;
+                                       output-high;
+                               };
+
+                               ethphy3-on-hog {
+                                       gpio-hog;
+                                       gpios = <3 GPIO_ACTIVE_HIGH>;
+                                       output-high;
+                               };
+
+                               ethphy4-on-hog {
+                                       gpio-hog;
+                                       gpios = <4 GPIO_ACTIVE_HIGH>;
+                                       output-high;
+                               };
+
+                               lvds-en-hog {
+                                       gpio-hog;
+                                       gpios = <9 GPIO_ACTIVE_HIGH>;
+                                       output-high;
+                               };
+                       };
+               };
+       };
+};
+
 &lpuart1 {
        bootph-pre-ram;
 };
 
+&netc_blk_ctrl {
+       assigned-clocks = <&scmi_clk IMX94_CLK_MAC2>,
+                         <&scmi_clk IMX94_CLK_MAC4>,
+                         <&scmi_clk IMX94_CLK_MAC5>;
+       assigned-clock-parents = <&scmi_clk IMX94_CLK_SYSPLL1_PFD0>,
+                                <&scmi_clk IMX94_CLK_SYSPLL1_PFD0>,
+                                <&scmi_clk IMX94_CLK_SYSPLL1_PFD0>;
+       assigned-clock-rates = <250000000>, <250000000>, <250000000>;
+       status = "okay";
+};
+
+&netc_emdio {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_emdio>;
+       phy-supply = <&reg_gpy_en>;
+       status = "okay";
+
+       ethphy5: ethernet-phy@6 {
+               reg = <0x6>;
+               realtek,clkout-disable;
+       };
+
+       ethphy6: ethernet-phy@7 {
+               reg = <0x7>;
+               realtek,clkout-disable;
+       };
+};
+
 &reg_usdhc2_vmmc {
        bootph-pre-ram;
 };
        status = "disabled";
 };
 
+&scmi_iomuxc {
+       pinctrl_emdio: emdiogrp {
+               fsl,pins = <
+                       IMX94_PAD_ETH4_MDC_GPIO1__NETC_EMDC             0x57e
+                       IMX94_PAD_ETH4_MDIO_GPIO2__NETC_EMDIO           0x97e
+               >;
+       };
+
+       pinctrl_eth3: eth3grp {
+               fsl,pins = <
+                       IMX94_PAD_ETH3_TXD3__NETC_PINMUX_ETH3_TXD3              0x57e
+                       IMX94_PAD_ETH3_TXD2__NETC_PINMUX_ETH3_TXD2              0x57e
+                       IMX94_PAD_ETH3_TXD1__NETC_PINMUX_ETH3_TXD1              0x57e
+                       IMX94_PAD_ETH3_TXD0__NETC_PINMUX_ETH3_TXD0              0x57e
+                       IMX94_PAD_ETH3_TX_CTL__NETC_PINMUX_ETH3_TX_CTL          0x57e
+                       IMX94_PAD_ETH3_TX_CLK__NETC_PINMUX_ETH3_TX_CLK          0x5fe
+                       IMX94_PAD_ETH3_RX_CTL__NETC_PINMUX_ETH3_RX_CTL          0x57e
+                       IMX94_PAD_ETH3_RX_CLK__NETC_PINMUX_ETH3_RX_CLK          0x5fe
+                       IMX94_PAD_ETH3_RXD0__NETC_PINMUX_ETH3_RXD0              0x57e
+                       IMX94_PAD_ETH3_RXD1__NETC_PINMUX_ETH3_RXD1              0x57e
+                       IMX94_PAD_ETH3_RXD2__NETC_PINMUX_ETH3_RXD2              0x57e
+                       IMX94_PAD_ETH3_RXD3__NETC_PINMUX_ETH3_RXD3              0x57e
+               >;
+       };
+
+       pinctrl_eth4: eth4grp {
+               fsl,pins = <
+                       IMX94_PAD_ETH4_TXD3__NETC_PINMUX_ETH4_TXD3              0x57e
+                       IMX94_PAD_ETH4_TXD2__NETC_PINMUX_ETH4_TXD2              0x57e
+                       IMX94_PAD_ETH4_TXD1__NETC_PINMUX_ETH4_TXD1              0x57e
+                       IMX94_PAD_ETH4_TXD0__NETC_PINMUX_ETH4_TXD0              0x57e
+                       IMX94_PAD_ETH4_TX_CTL__NETC_PINMUX_ETH4_TX_CTL          0x57e
+                       IMX94_PAD_ETH4_TX_CLK__NETC_PINMUX_ETH4_TX_CLK          0x5fe
+                       IMX94_PAD_ETH4_RX_CTL__NETC_PINMUX_ETH4_RX_CTL          0x57e
+                       IMX94_PAD_ETH4_RX_CLK__NETC_PINMUX_ETH4_RX_CLK          0x5fe
+                       IMX94_PAD_ETH4_RXD0__NETC_PINMUX_ETH4_RXD0              0x57e
+                       IMX94_PAD_ETH4_RXD1__NETC_PINMUX_ETH4_RXD1              0x57e
+                       IMX94_PAD_ETH4_RXD2__NETC_PINMUX_ETH4_RXD2              0x57e
+                       IMX94_PAD_ETH4_RXD3__NETC_PINMUX_ETH4_RXD3              0x57e
+               >;
+       };
+
+       pinctrl_lpi2c3: lpi2c3grp {
+               fsl,pins = <
+                       IMX94_PAD_GPIO_IO16__LPI2C3_SDA         0x40000b9e
+                       IMX94_PAD_GPIO_IO17__LPI2C3_SCL         0x40000b9e
+               >;
+       };
+};
+
 &pinctrl_reg_usdhc2_vmmc {
        bootph-pre-ram;
 };
index 8c89b8be04b301c5e3b5f1225998817e69b9e395..2b93ba9a38b40c6ef3b3915c2ff4eff0e4f4007b 100644 (file)
                };
        };
 
+       reg_gpy_stby: regulator-gpy-stby {
+               compatible = "regulator-fixed";
+               regulator-name = "gpy-stby";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&pcal6416_i2c3_u171 5 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       reg_gpy_en: regulator-gpy-en {
+               compatible = "regulator-fixed";
+               regulator-name = "gpy-en";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               vin-supply = <&reg_gpy_stby>;
+               gpio = <&pcal6416_i2c3_u171 6 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
        usbphynop: usbphynop {
                compatible = "usb-nop-xceiv";
                clocks = <&scmi_clk IMX94_CLK_HSIO>;
                #index-cells = <1>;
        };
 
+       netc_blk_ctrl: system-controller@4ceb0000 {
+               compatible = "nxp,imx94-netc-blk-ctrl";
+               reg = <0x0 0x4ceb0000 0x0 0x10000>,
+                     <0x0 0x4cec0000 0x0 0x10000>,
+                     <0x0 0x4c810000 0x0 0x7C>;
+               reg-names = "ierb", "prb", "netcmix";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+               power-domains = <&scmi_devpd IMX94_PD_NETC>;
+               status = "disabled";
+
+               netc_bus0: pcie@4ca00000 {
+                       compatible = "pci-host-ecam-generic";
+                       reg = <0x0 0x4ca00000 0x0 0x100000>;
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       linux,pci-domain = <0>;
+                       bus-range = <0x0 0x0>;
+                               /* Switch BAR0 - non-prefetchable memory */
+                       ranges = <0x02000000 0x0 0x4cc00000  0x0 0x4cc00000  0x0 0x80000
+                               /* ENETC 3 and Timer 0 BAR0 - non-prefetchable memory */
+                               0x02000000 0x0 0x4cd40000  0x0 0x4cd40000  0x0 0x60000
+                               /* Switch and Timer 0 BAR2 - prefetchable memory */
+                               0x42000000 0x0 0x4ce00000  0x0 0x4ce00000  0x0 0x20000
+                               /* ENETC 3 VF0-2 BAR0 - non-prefetchable memory */
+                               0x02000000 0x0 0x4ce50000  0x0 0x4ce50000  0x0 0x30000
+                               /* ENETC 3 VF0-2 BAR2 - prefetchable memory */
+                               0x42000000 0x0 0x4ce80000  0x0 0x4ce80000  0x0 0x30000>;
+
+                       enetc3: ethernet@0,0 {
+                               compatible = "pci1131,e110";
+                               reg = <0x0 0 0 0 0>;
+                               phy-mode = "internal";
+                               status = "disabled";
+
+                               fixed-link {
+                                       speed = <2500>;
+                                       full-duplex;
+                                       pause;
+                               };
+                       };
+
+                       netc_timer0: ethernet@0,1 {
+                               compatible = "pci1131,ee02";
+                               reg = <0x100 0 0 0 0>;
+                               status = "disabled";
+                       };
+
+                       netc_switch: ethernet-switch@0,2 {
+                               compatible = "pci1131,eef2", "nxp,imx943-netc-switch";
+                               reg = <0x200 0 0 0 0>;
+                               status = "disabled";
+
+                               netc_switch_ports: ports {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       /* External ports */
+                                       netc_switch_port0: port@0 {
+                                               reg = <0>;
+                                               status = "disabled";
+                                       };
+
+                                       netc_switch_port1: port@1 {
+                                               reg = <1>;
+                                               status = "disabled";
+                                       };
+
+                                       netc_switch_port2: port@2 {
+                                               reg = <2>;
+                                               status = "disabled";
+                                       };
+
+                                       /* Internal port, a.k.a management port */
+                                       netc_switch_port3: port@3 {
+                                               reg = <3>;
+                                               phy-mode = "internal";
+                                               ethernet = <&enetc3>;
+                                               status = "disabled";
+
+                                               fixed-link {
+                                                       speed = <2500>;
+                                                       full-duplex;
+                                                       pause;
+                                               };
+                                       };
+                               };
+                       };
+               };
+
+               netc_bus1: pcie@4cb00000 {
+                       compatible = "pci-host-ecam-generic";
+                       reg = <0x0 0x4cb00000 0x0 0x100000>;
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       linux,pci-domain = <1>;
+                       bus-range = <0x1 0x1>;
+                               /* ENETC 0-2 BAR0 - non-prefetchable memory */
+                       ranges = <0x02000000 0x0 0x4cC80000  0x0 0x4cc80000  0x0 0xc0000
+                               /* Timer 1-2 and EMDIO BAR0 - non-prefetchable memory */
+                               0x02000000 0x0 0x4cda0000  0x0 0x4cda0000  0x0 0x60000
+                               /* Timer 1-2 and EMDIO BAR2 - prefetchable memory */
+                               0x42000000 0x0 0x4ce20000  0x0 0x4ce20000  0x0 0x30000>;
+
+                       enetc0: ethernet@0,0 {
+                               compatible = "pci1131,e101";
+                               reg = <0x10000 0 0 0 0>;
+                               status = "disabled";
+                       };
+
+                       netc_timer1: ethernet@0,1 {
+                               compatible = "pci1131,ee02";
+                               reg = <0x10100 0 0 0 0>;
+                               status = "disabled";
+                       };
+
+                       enetc1: ethernet@8,0 {
+                               compatible = "pci1131,e101";
+                               reg = <0x14000 0 0 0 0>;
+                               status = "disabled";
+                       };
+
+                       enetc2: ethernet@10,0 {
+                               compatible = "pci1131,e101";
+                               reg = <0x18000 0 0 0 0>;
+                               status = "disabled";
+                       };
+
+                       netc_timer2: ethernet@10,1 {
+                               compatible = "pci1131,ee02";
+                               reg = <0x18100 0 0 0 0>;
+                               status = "disabled";
+                       };
+
+                       netc_emdio: mdio@18,0 {
+                               compatible = "pci1131,ee00";
+                               reg = <0x1c000 0 0 0 0>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+               };
+       };
+
        elemu1: mailbox@47530000 {
                compatible = "fsl,imx93-mu-s4";
                reg = <0x0 0x47530000 0x0 0x10000>;
index e4fcf2eb57691bc1357843345427b44391013ca4..39b616e266ec6510800aaa6c84b9e9e63c5367c0 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_SYS_CBSIZE=2048
 CONFIG_SYS_PBSIZE=2074
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_BOARD_LATE_INIT=y
+CONFIG_PCI_INIT_R=y
 CONFIG_SPL_MAX_SIZE=0x30000
 CONFIG_SPL_BOARD_INIT=y
 CONFIG_SPL_LOAD_IMX_CONTAINER=y
@@ -83,6 +84,8 @@ CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_NOWHERE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SYS_RX_ETH_BUFFER=8
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_REGMAP=y
@@ -97,9 +100,19 @@ CONFIG_SPL_CLK_SCMI=y
 CONFIG_SPL_FIRMWARE=y
 # CONFIG_SCMI_AGENT_SMCCC is not set
 CONFIG_IMX_RGPIO2P=y
+CONFIG_DM_PCA953X=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_IMX_LPI2C=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
 CONFIG_IMX_MU_MBOX=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_FSL_USDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_MDIO=y
+CONFIG_FSL_ENETC=y
+CONFIG_PCIE_ECAM_GENERIC=y
 CONFIG_SPL_PHY=y
 CONFIG_SPL_PHY_IMX8MQ_USB=y
 CONFIG_PINCTRL=y