]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: broadcom: bcm2712: Add V3D device node
authorMaíra Canal <mcanal@igalia.com>
Wed, 14 Jan 2026 12:04:58 +0000 (09:04 -0300)
committerFlorian Fainelli <florian.fainelli@broadcom.com>
Mon, 16 Mar 2026 19:58:59 +0000 (12:58 -0700)
Commits 0ad5bc1ce463 ("drm/v3d: fix up register addresses for V3D 7.x")
and 6fd9487147c4 ("drm/v3d: add brcm,2712-v3d as a compatible V3D device")
added driver support for V3D on BCM2712, but the corresponding device
tree node is still missing.

Add the V3D device tree node to the BCM2712 DTS.

Signed-off-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Stefan Wahren <wahrenst@gmx.net>
Link: https://lore.kernel.org/r/20260114120610.82531-1-mcanal@igalia.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-base.dtsi
arch/arm64/boot/dts/broadcom/bcm2712.dtsi

index 04738bf281ebda5c027766bf43e65c99e92976a5..dbfba51ebe9153dc6cd97fc2b7aa3282694a2088 100644 (file)
 &pcie2 {
        status = "okay";
 };
+
+&v3d {
+       clocks = <&firmware_clocks 5>;
+};
index d57a9b1bff70c0e4b5ef97d3e8a72521143deab7..69bd2934b93b34fef27989f9ddcd8a860979ab5f 100644 (file)
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/bcm2835-pm.h>
 
 / {
        compatible = "brcm,bcm2712";
                        msi-ranges = <&gicv2 GIC_SPI 247 IRQ_TYPE_EDGE_RISING 8>;
                        brcm,msi-offset = <8>;
                };
+
+               v3d: gpu@1002000000 {
+                       compatible = "brcm,2712-v3d";
+                       reg = <0x10 0x02000000 0x00 0x4000>,
+                             <0x10 0x02008000 0x00 0x6000>,
+                             <0x10 0x02030800 0x00 0x0700>;
+                       reg-names = "hub", "core0", "sms";
+
+                       power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
+                       resets = <&pm BCM2835_RESET_V3D>;
+                       interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
+               };
        };
 
        timer {