]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
5.18-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 15 Jul 2022 05:13:12 +0000 (07:13 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 15 Jul 2022 05:13:12 +0000 (07:13 +0200)
added patches:
x86-speculation-use-declare_per_cpu-for-x86_spec_ctrl_current.patch

queue-5.18/series
queue-5.18/x86-speculation-use-declare_per_cpu-for-x86_spec_ctrl_current.patch [new file with mode: 0644]

index cf5d1d987b009d3e7ba35897e188759aaba9e602..d6f583d555fe70dee09101d06ad7d927cf5df4c4 100644 (file)
@@ -60,3 +60,4 @@ x86-kexec-disable-ret-on-kexec.patch
 x86-speculation-disable-rrsba-behavior.patch
 x86-static_call-serialize-__static_call_fixup-properly.patch
 x86-asm-32-fix-annotate_unret_safe-use-on-32-bit.patch
+x86-speculation-use-declare_per_cpu-for-x86_spec_ctrl_current.patch
diff --git a/queue-5.18/x86-speculation-use-declare_per_cpu-for-x86_spec_ctrl_current.patch b/queue-5.18/x86-speculation-use-declare_per_cpu-for-x86_spec_ctrl_current.patch
new file mode 100644 (file)
index 0000000..bb1f4dd
--- /dev/null
@@ -0,0 +1,51 @@
+From db886979683a8360ced9b24ab1125ad0c4d2cf76 Mon Sep 17 00:00:00 2001
+From: Nathan Chancellor <nathan@kernel.org>
+Date: Wed, 13 Jul 2022 08:24:37 -0700
+Subject: x86/speculation: Use DECLARE_PER_CPU for x86_spec_ctrl_current
+
+From: Nathan Chancellor <nathan@kernel.org>
+
+commit db886979683a8360ced9b24ab1125ad0c4d2cf76 upstream.
+
+Clang warns:
+
+  arch/x86/kernel/cpu/bugs.c:58:21: error: section attribute is specified on redeclared variable [-Werror,-Wsection]
+  DEFINE_PER_CPU(u64, x86_spec_ctrl_current);
+                      ^
+  arch/x86/include/asm/nospec-branch.h:283:12: note: previous declaration is here
+  extern u64 x86_spec_ctrl_current;
+             ^
+  1 error generated.
+
+The declaration should be using DECLARE_PER_CPU instead so all
+attributes stay in sync.
+
+Cc: stable@vger.kernel.org
+Fixes: fc02735b14ff ("KVM: VMX: Prevent guest RSB poisoning attacks with eIBRS")
+Reported-by: kernel test robot <lkp@intel.com>
+Signed-off-by: Nathan Chancellor <nathan@kernel.org>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/include/asm/nospec-branch.h |    3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/arch/x86/include/asm/nospec-branch.h
++++ b/arch/x86/include/asm/nospec-branch.h
+@@ -11,6 +11,7 @@
+ #include <asm/cpufeatures.h>
+ #include <asm/msr-index.h>
+ #include <asm/unwind_hints.h>
++#include <asm/percpu.h>
+ #define RETPOLINE_THUNK_SIZE  32
+@@ -280,7 +281,7 @@ static inline void indirect_branch_predi
+ /* The Intel SPEC CTRL MSR base value cache */
+ extern u64 x86_spec_ctrl_base;
+-extern u64 x86_spec_ctrl_current;
++DECLARE_PER_CPU(u64, x86_spec_ctrl_current);
+ extern void write_spec_ctrl_current(u64 val, bool force);
+ extern u64 spec_ctrl_current(void);