]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
MIPS: Always record SEGBITS in cpu_data.vmbits
authorMaciej W. Rozycki <macro@orcam.me.uk>
Fri, 27 Mar 2026 18:57:18 +0000 (18:57 +0000)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Wed, 1 Apr 2026 19:53:50 +0000 (21:53 +0200)
With a 32-bit kernel running on 64-bit MIPS hardware the hardcoded value
of `cpu_vmbits' only records the size of compatibility useg and does not
reflect the size of native xuseg or the complete range of values allowed
in the VPN2 field of TLB entries.

An upcoming change will need the actual VPN2 value range permitted even
in 32-bit kernel configurations, so always include the `vmbits' member
in `struct cpuinfo_mips' and probe for SEGBITS when running on 64-bit
hardware and resorting to the currently hardcoded value of 31 on 32-bit
processors.  No functional change for users of `cpu_vmbits'.

Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/include/asm/cpu-features.h
arch/mips/include/asm/cpu-info.h
arch/mips/include/asm/mipsregs.h
arch/mips/kernel/cpu-probe.c
arch/mips/kernel/cpu-r3k-probe.c

index 404390bb87eaf5b3391b3d38be7cd3e43849dde2..3f11e5218e6c65759cc5442e87c514e5139e4d01 100644 (file)
 # endif
 # ifndef cpu_vmbits
 # define cpu_vmbits cpu_data[0].vmbits
-# define __NEED_VMBITS_PROBE
 # endif
 #endif
 
index fd60837ce50bc0a944eef459f9546a98be536c0d..211b578af6aa0a112426f42a965c4efab8f8ee74 100644 (file)
@@ -80,9 +80,7 @@ struct cpuinfo_mips {
        int                     srsets; /* Shadow register sets */
        int                     package;/* physical package number */
        unsigned int            globalnumber;
-#ifdef CONFIG_64BIT
        int                     vmbits; /* Virtual memory size in bits */
-#endif
        void                    *data;  /* Additional data */
        unsigned int            watch_reg_count;   /* Number that exist */
        unsigned int            watch_reg_use_cnt; /* Usable by ptrace */
index f799c0d723dac2bf07aa7600ac22ef3178118e73..12a095dbf9e2a9c0e5315cb7203fbc0318b27efe 100644 (file)
@@ -1871,6 +1871,8 @@ do {                                                                      \
 
 #define read_c0_entryhi()      __read_ulong_c0_register($10, 0)
 #define write_c0_entryhi(val)  __write_ulong_c0_register($10, 0, val)
+#define read_c0_entryhi_64()   __read_64bit_c0_register($10, 0)
+#define write_c0_entryhi_64(val) __write_64bit_c0_register($10, 0, val)
 
 #define read_c0_guestctl1()    __read_32bit_c0_register($10, 4)
 #define write_c0_guestctl1(val)        __write_32bit_c0_register($10, 4, val)
index 1e49e05ac8b1c4140ab09ef173a8dd4077642980..489612ed9d498719ec0515ebc59d655d129d5c4b 100644 (file)
@@ -210,11 +210,14 @@ static inline void set_elf_base_platform(const char *plat)
 
 static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)
 {
-#ifdef __NEED_VMBITS_PROBE
-       write_c0_entryhi(0x3fffffffffffe000ULL);
-       back_to_back_c0_hazard();
-       c->vmbits = fls64(read_c0_entryhi() & 0x3fffffffffffe000ULL);
-#endif
+       int vmbits = 31;
+
+       if (cpu_has_64bits) {
+               write_c0_entryhi_64(0x3fffffffffffe000ULL);
+               back_to_back_c0_hazard();
+               vmbits = fls64(read_c0_entryhi_64() & 0x3fffffffffffe000ULL);
+       }
+       c->vmbits = vmbits;
 }
 
 static void set_isa(struct cpuinfo_mips *c, unsigned int isa)
index 0c826f729f7527d5eabdd5416cf6afc174307801..edcf04de0a6fbf2c8dfe566acb9fcab7fc441d34 100644 (file)
@@ -137,6 +137,8 @@ void cpu_probe(void)
        else
                cpu_set_nofpu_opts(c);
 
+       c->vmbits = 31;
+
        reserve_exception_space(0, 0x400);
 }