re PR middle-end/10475 (ICE in subreg_highpart_offset for code with long long)

        PR middle-end/10475
        * expmed.c (emit_store_flag): Use simplify_gen_subreg directly
        for extracting sub-words.
	* gcc.c-torture/compile/20030612-1.c: New.

From-SVN: r67865

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6d2df27247ba2b4fc84a4758c6a190bcb102616a..da431d54538356d874e75ba9bb6ca5d3a067f5e7 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2003-06-12  Richard Henderson  <rth@redhat.com>
+
+        PR middle-end/10475
+        * expmed.c (emit_store_flag): Use simplify_gen_subreg directly
+        for extracting sub-words.
+
 2003-06-12  Richard Henderson  <rth@redhat.com>
 
         PR target/7594

diff --git a/gcc/expmed.c b/gcc/expmed.c
index 5cc08945eddcd5c99c7b1d7fd06d28e37f700a46..43007569a6cd2d1b4ac9c15cd47e65dae6cc9710 100644 (file)
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -4354,19 +4354,27 @@ emit_store_flag (target, code, op0, op1, mode, unsignedp, normalizep)
     {
       if (code == EQ || code == NE)
        {
+         rtx op00, op01, op0both;
+
          /* Do a logical OR of the two words and compare the result.  */
-         rtx op0h = gen_highpart (word_mode, op0);
-         rtx op0l = gen_lowpart (word_mode, op0);
-         rtx op0both = expand_binop (word_mode, ior_optab, op0h, op0l,
-                                     NULL_RTX, unsignedp, OPTAB_DIRECT);
+         op00 = simplify_gen_subreg (word_mode, op0, mode, 0);
+         op01 = simplify_gen_subreg (word_mode, op0, mode, UNITS_PER_WORD);
+         op0both = expand_binop (word_mode, ior_optab, op00, op01,
+                                 NULL_RTX, unsignedp, OPTAB_DIRECT);
          if (op0both != 0)
            return emit_store_flag (target, code, op0both, op1, word_mode,
                                    unsignedp, normalizep);
        }
       else if (code == LT || code == GE)
-       /* If testing the sign bit, can just test on high word.  */
-       return emit_store_flag (target, code, gen_highpart (word_mode, op0),
-                               op1, word_mode, unsignedp, normalizep);
+       {
+         rtx op0h;
+
+         /* If testing the sign bit, can just test on high word.  */
+         op0h = simplify_gen_subreg (word_mode, op0, mode,
+                                     subreg_highpart_offset (word_mode, mode));
+         return emit_store_flag (target, code, op0h, op1, word_mode,
+                                 unsignedp, normalizep);
+       }
     }
 
   /* From now on, we won't change CODE, so set ICODE now.  */

diff --git a/gcc/testsuite/gcc.c-torture/compile/20030612-1.c b/gcc/testsuite/gcc.c-torture/compile/20030612-1.c
new file mode 100644 (file)
index 0000000..8edbd92
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/20030612-1.c
@@ -0,0 +1,11 @@
+static inline void
+foo (long long const v0, long long const v1)
+{
+  bar (v0 == v1);
+}
+
+void
+test (void)
+{
+  foo (0, 1);
+}