powerpc/64s: Move dcbt/dcbtst sequence into a macro

There's an almost identical code sequence to specify load/store access
hints in __copy_tofrom_user_power7(), copypage_power7() and
memcpy_power7().

Move the sequence into a common macro, which is passed the registers to
use as they differ slightly.

There also needs to be a copy in the selftests, it could be shared in
future if the headers are cleaned up / refactored.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20240229122521.762431-1-mpe@ellerman.id.au

diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 041ee25955205744854618cbdfd9fdf1c199f7ca..78c7548eac1e1974f4b91c4dac726fea132c5bc1 100644 (file)
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -510,6 +510,18 @@ END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)
        lis     scratch,0x60000000@h;                   \
        dcbt    0,scratch,0b01010
 
+#define DCBT_SETUP_STREAMS(from, from_parms, to, to_parms, scratch)    \
+       lis     scratch,0x8000; /* GO=1 */                              \
+       clrldi  scratch,scratch,32;                                     \
+       /* setup read stream 0 */                                       \
+       dcbt    0,from,0b01000;         /* addr from */                 \
+       dcbt    0,from_parms,0b01010;   /* length and depth from */     \
+       /* setup write stream 1 */                                      \
+       dcbtst  0,to,0b01000;           /* addr to */                   \
+       dcbtst  0,to_parms,0b01010;     /* length and depth to */       \
+       eieio;                                                          \
+       dcbt    0,scratch,0b01010;      /* all streams GO */
+
 /*
  * toreal/fromreal/tophys/tovirt macros. 32-bit BookE makes them
  * keep the address intact to be compatible with code shared with

diff --git a/arch/powerpc/lib/copypage_power7.S b/arch/powerpc/lib/copypage_power7.S
index a783973f1215b526d136c49254102520ffb67a7b..07e7cec4d135fd5648ab9a0d7d93827440ebb2ac 100644 (file)
--- a/arch/powerpc/lib/copypage_power7.S
+++ b/arch/powerpc/lib/copypage_power7.S
@@ -27,17 +27,7 @@ _GLOBAL(copypage_power7)
 #endif
        ori     r10,r7,1        /* stream=1 */
 
-       lis     r8,0x8000       /* GO=1 */
-       clrldi  r8,r8,32
-
-       /* setup read stream 0  */
-       dcbt    0,r4,0b01000    /* addr from */
-       dcbt    0,r7,0b01010   /* length and depth from */
-       /* setup write stream 1 */
-       dcbtst  0,r9,0b01000   /* addr to */
-       dcbtst  0,r10,0b01010  /* length and depth to */
-       eieio
-       dcbt    0,r8,0b01010    /* all streams GO */
+       DCBT_SETUP_STREAMS(r4, r7, r9, r10, r8)
 
 #ifdef CONFIG_ALTIVEC
        mflr    r0

diff --git a/arch/powerpc/lib/copyuser_power7.S b/arch/powerpc/lib/copyuser_power7.S
index ac41053c3a5af09549a80db401ea5e830dc7c8fe..8474c682a17849a29a3dfcb3af6544fc1e8909c6 100644 (file)
--- a/arch/powerpc/lib/copyuser_power7.S
+++ b/arch/powerpc/lib/copyuser_power7.S
@@ -298,17 +298,7 @@ err1;      stb     r0,0(r3)
        or      r7,r7,r0
        ori     r10,r7,1        /* stream=1 */
 
-       lis     r8,0x8000       /* GO=1 */
-       clrldi  r8,r8,32
-
-       /* setup read stream 0 */
-       dcbt    0,r6,0b01000   /* addr from */
-       dcbt    0,r7,0b01010   /* length and depth from */
-       /* setup write stream 1 */
-       dcbtst  0,r9,0b01000   /* addr to */
-       dcbtst  0,r10,0b01010  /* length and depth to */
-       eieio
-       dcbt    0,r8,0b01010    /* all streams GO */
+       DCBT_SETUP_STREAMS(r6, r7, r9, r10, r8)
 
        beq     cr1,.Lunwind_stack_nonvmx_copy
 

diff --git a/arch/powerpc/lib/memcpy_power7.S b/arch/powerpc/lib/memcpy_power7.S
index 9398b2b746c4dacad1e1fc24c85f5f8fa25b22b1..b7c5e7fca8b9f5fb2fc46e7acb9d817c74b4ac24 100644 (file)
--- a/arch/powerpc/lib/memcpy_power7.S
+++ b/arch/powerpc/lib/memcpy_power7.S
@@ -244,15 +244,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
        or      r7,r7,r0
        ori     r10,r7,1        /* stream=1 */
 
-       lis     r8,0x8000       /* GO=1 */
-       clrldi  r8,r8,32
-
-       dcbt    0,r6,0b01000
-       dcbt    0,r7,0b01010
-       dcbtst  0,r9,0b01000
-       dcbtst  0,r10,0b01010
-       eieio
-       dcbt    0,r8,0b01010    /* GO */
+       DCBT_SETUP_STREAMS(r6, r7, r9, r10, r8)
 
        beq     cr1,.Lunwind_stack_nonvmx_copy
 

diff --git a/tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h b/tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h
index a89f1fbf86ecbfb42a1dd949fcb360a9b8df4539..1d293ab7718507d4f4e2dd3fdd8fa4f113c78ae6 100644 (file)
--- a/tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h
+++ b/tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h
@@ -47,4 +47,16 @@
 /* Default to taking the first of any alternative feature sections */
 test_feature = 1
 
+#define DCBT_SETUP_STREAMS(from, from_parms, to, to_parms, scratch)    \
+       lis     scratch,0x8000; /* GO=1 */                              \
+       clrldi  scratch,scratch,32;                                     \
+       /* setup read stream 0 */                                       \
+       dcbt    0,from,0b01000;         /* addr from */                 \
+       dcbt    0,from_parms,0b01010;   /* length and depth from */     \
+       /* setup write stream 1 */                                      \
+       dcbtst  0,to,0b01000;           /* addr to */                   \
+       dcbtst  0,to_parms,0b01010;     /* length and depth to */       \
+       eieio;                                                          \
+       dcbt    0,scratch,0b01010;      /* all streams GO */
+
 #endif /* __SELFTESTS_POWERPC_PPC_ASM_H */