ufs: core: Add ufshcd_dme_enable() and ufshcd_dme_reset()

In order for host drivers to use.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://patch.msgid.link/1760948182-128561-1-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index 2125e70a0548aafe266e57e86f7d112dd4d7fc70..b4f994c5bc0f55122a712bba07b905099b077df2 100644 (file)
--- a/drivers/ufs/ufs.c
+++ b/drivers/ufs/ufs.c
@@ -369,6 +369,36 @@ static int ufshcd_dme_link_startup(struct ufs_hba *hba)
        return ret;
 }
 
+int ufshcd_dme_enable(struct ufs_hba *hba)
+{
+       struct uic_command uic_cmd = {0};
+       int ret;
+
+       uic_cmd.command = UIC_CMD_DME_ENABLE;
+
+       ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
+       if (ret)
+               dev_dbg(hba->dev,
+                       "dme-enable: error code %d\n", ret);
+
+       return ret;
+}
+
+int ufshcd_dme_reset(struct ufs_hba *hba)
+{
+       struct uic_command uic_cmd = {0};
+       int ret;
+
+       uic_cmd.command = UIC_CMD_DME_RESET;
+
+       ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
+       if (ret)
+               dev_dbg(hba->dev,
+                       "dme-reset: error code %d\n", ret);
+
+       return ret;
+}
+
 /**
  * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
  *

diff --git a/drivers/ufs/ufs.h b/drivers/ufs/ufs.h
index d38b6fec2ca4a8ec9aca1ebf8a7bec7e5fb7e06e..bc839a437045d45f94906af7d223bacd37c8c26c 100644 (file)
--- a/drivers/ufs/ufs.h
+++ b/drivers/ufs/ufs.h
@@ -447,6 +447,8 @@ int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
                        u8 attr_set, u32 mib_val, u8 peer);
 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
                        u32 *mib_val, u8 peer);
+int ufshcd_dme_enable(struct ufs_hba *hba);
+int ufshcd_dme_reset(struct ufs_hba *hba);
 
 static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
                                 u32 mib_val)