arm64: dts: qcom: lemans: correct Iris corners for the MXC rail

The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
match the PLL corners on the MXC rail. Correct the performance corners
for the MXC rail following the PLL documentation.

Fixes: 7bc95052c64f ("arm64: dts: qcom: sa8775p: add support for video node")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260313-iris-fix-corners-v1-2-32a393c25dda@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index 67b2c7e819ad475411332154a947d39507a0022d..147ebf9b1ac61135c0abbaeceb481fcf0ec437e6 100644 (file)
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -4625,19 +4625,19 @@
 
                                opp-444000000 {
                                        opp-hz = /bits/ 64 <444000000>;
-                                       required-opps = <&rpmhpd_opp_nom>,
+                                       required-opps = <&rpmhpd_opp_svs_l1>,
                                                        <&rpmhpd_opp_nom>;
                                };
 
                                opp-533000000 {
                                        opp-hz = /bits/ 64 <533000000>;
-                                       required-opps = <&rpmhpd_opp_turbo>,
+                                       required-opps = <&rpmhpd_opp_nom>,
                                                        <&rpmhpd_opp_turbo>;
                                };
 
                                opp-560000000 {
                                        opp-hz = /bits/ 64 <560000000>;
-                                       required-opps = <&rpmhpd_opp_turbo_l1>,
+                                       required-opps = <&rpmhpd_opp_nom>,
                                                        <&rpmhpd_opp_turbo_l1>;
                                };
                        };