]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
cpufreq/amd-pstate: Fix a regression leading to EPP 0 after hibernate
authorMario Limonciello (AMD) <superm1@kernel.org>
Tue, 23 Sep 2025 15:29:29 +0000 (10:29 -0500)
committerMario Limonciello (AMD) <superm1@kernel.org>
Wed, 15 Oct 2025 13:21:16 +0000 (08:21 -0500)
After resuming from S4, all CPUs except the boot CPU have the wrong EPP
hint programmed.  This is because when the CPUs were offlined the EPP value
was reset to 0.

This is a similar problem as fixed by
commit ba3319e590571 ("cpufreq/amd-pstate: Fix a regression leading to EPP
0 after resume") and the solution is also similar.  When offlining rather
than reset the values to zero, reset them to match those chosen by the
policy. When the CPUs are onlined again these values will be restored.

Closes: https://community.frame.work/t/increased-power-usage-after-resuming-from-suspend-on-ryzen-7040-kernel-6-15-regression/74531/20?u=mario_limonciello
Fixes: 608a76b65288 ("cpufreq/amd-pstate: Add support for the "Requested CPU Min frequency" BIOS option")
Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
drivers/cpufreq/amd-pstate.c

index 298e92d8cc0315dfbfdbae74097cc590bae3b89c..b44f0f7a5ba1c7e70b1935ed94b6446cc2acf466 100644 (file)
@@ -1614,7 +1614,11 @@ static int amd_pstate_cpu_offline(struct cpufreq_policy *policy)
         * min_perf value across kexec reboots. If this CPU is just onlined normally after this, the
         * limits, epp and desired perf will get reset to the cached values in cpudata struct
         */
-       return amd_pstate_update_perf(policy, perf.bios_min_perf, 0U, 0U, 0U, false);
+       return amd_pstate_update_perf(policy, perf.bios_min_perf,
+                                    FIELD_GET(AMD_CPPC_DES_PERF_MASK, cpudata->cppc_req_cached),
+                                    FIELD_GET(AMD_CPPC_MAX_PERF_MASK, cpudata->cppc_req_cached),
+                                    FIELD_GET(AMD_CPPC_EPP_PERF_MASK, cpudata->cppc_req_cached),
+                                    false);
 }
 
 static int amd_pstate_suspend(struct cpufreq_policy *policy)