]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
arm: zynq: cse_qspi: Fix overwriting spi-rx-bus-width property
authorSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Tue, 11 Sep 2018 09:39:56 +0000 (15:09 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 11 Sep 2018 13:14:13 +0000 (15:14 +0200)
spi-rx-bus-width property is part of flash, so it should be moved
to flash node from qspi node. This patch fixes the incorrect read
of spi-rx-bus-width property by moving it to flash node.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/dts/zynq-cse-qspi-parallel.dts
arch/arm/dts/zynq-cse-qspi-single.dts
arch/arm/dts/zynq-cse-qspi-stacked.dts
arch/arm/dts/zynq-cse-qspi-x1-single.dts
arch/arm/dts/zynq-cse-qspi-x1-stacked.dts
arch/arm/dts/zynq-cse-qspi-x2-single.dts
arch/arm/dts/zynq-cse-qspi-x2-stacked.dts
arch/arm/dts/zynq-cse-qspi.dtsi

index 52e6ce7537fe4573fa60e985a69f30144df054c0..bbb5e3277721bf8d29099256e94fc163eaf0fb38 100644 (file)
@@ -10,5 +10,8 @@
 
 &qspi {
        is-dual = <1>;
+};
+
+&flash0 {
        spi-rx-bus-width = <4>;
 };
index bc08303d7a1acab1196ab2b85743483d187e0b0e..fab7e3c620e9b9d3aeab7c8e92a8e9865246b2ea 100644 (file)
@@ -8,6 +8,6 @@
 
 #include "zynq-cse-qspi.dtsi"
 
-&qspi {
+&flash0 {
        spi-rx-bus-width = <4>;
 };
index 68bba697e370d30ea1a87a16f0b1221bc3eb5c0c..bc72ae1c18ef49eb6d7a0814b38c12f05ea7cf40 100644 (file)
@@ -11,5 +11,8 @@
 &qspi {
        is-dual = <0>;
        is-stacked = <1>;
+};
+
+&flash0 {
        spi-rx-bus-width = <4>;
 };
index f660a524405182e3786afdfb3a37642aca7b8792..704ace0cbb37e84806d18a5dd1a7be6ccf07c89f 100644 (file)
@@ -8,6 +8,6 @@
 
 #include "zynq-cse-qspi.dtsi"
 
-&qspi {
+&flash0 {
        spi-rx-bus-width = <1>;
 };
index 885f034773684ad321a8579d5c04e3acb8ee1250..ae564d2fcb70022322590d9d3604da4f28f0b9b7 100644 (file)
@@ -11,5 +11,8 @@
 &qspi {
        is-dual = <0>;
        is-stacked = <1>;
+};
+
+&flash0 {
        spi-rx-bus-width = <1>;
 };
index 1e5497468fbfaae158e4cc615aace3406ae90038..a299d81e4ba3e01a67ebc19afba84df34e3ab4bd 100644 (file)
@@ -8,6 +8,6 @@
 
 #include "zynq-cse-qspi.dtsi"
 
-&qspi {
+&flash0 {
        spi-rx-bus-width = <2>;
 };
index 9d2113e59272f63a309264c9a94935a982634bca..a94e4d67238d5255804a8167d85f501bd49329d6 100644 (file)
@@ -11,5 +11,8 @@
 &qspi {
        is-dual = <0>;
        is-stacked = <1>;
+};
+
+&flash0 {
        spi-rx-bus-width = <2>;
 };
index 1c3736f1cd6ac2d9fdcf5b7e179fa3c268b8961a..3c0695e03c2ea30ec6dd302f252404e8f78bdfc8 100644 (file)
@@ -60,7 +60,7 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
                        num-cs = <1>;
-                       flash@0 {
+                       flash0: flash@0 {
                                compatible = "n25q128a11";
                                reg = <0x0>;
                                spi-tx-bus-width = <1>;