x86/microcode: Fix Entrysign revision check for Zen1/Naples

... to match AMD's statement here:

https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7033.html

Fixes: 50cef76d5cb0 ("x86/microcode/AMD: Load only SHA256-checksummed patches")
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Cc: <stable@kernel.org>
Link: https://patch.msgid.link/20251020144124.2930784-1-andrew.cooper3@citrix.com

diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
index cdce885e2fd50a0735c9908803035c8367899ce2..28ed8c0890241180db9a1ad45aa481f68683de24 100644 (file)
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -194,7 +194,7 @@ static bool need_sha_check(u32 cur_rev)
        }
 
        switch (cur_rev >> 8) {
-       case 0x80012: return cur_rev <= 0x800126f; break;
+       case 0x80012: return cur_rev <= 0x8001277; break;
        case 0x80082: return cur_rev <= 0x800820f; break;
        case 0x83010: return cur_rev <= 0x830107c; break;
        case 0x86001: return cur_rev <= 0x860010e; break;