static void versal_virt_machine_class_init(ObjectClass *oc, const void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
+ int num_cpu = versal_get_num_cpu(VERSAL_VER_VERSAL);
mc->desc = "Xilinx Versal Virtual development board";
mc->init = versal_virt_init;
- mc->min_cpus = XLNX_VERSAL_NR_ACPUS + XLNX_VERSAL_NR_RCPUS;
- mc->max_cpus = XLNX_VERSAL_NR_ACPUS + XLNX_VERSAL_NR_RCPUS;
- mc->default_cpus = XLNX_VERSAL_NR_ACPUS + XLNX_VERSAL_NR_RCPUS;
+ mc->min_cpus = num_cpu;
+ mc->max_cpus = num_cpu;
+ mc->default_cpus = num_cpu;
mc->no_cdrom = true;
mc->auto_create_sdcard = true;
mc->default_ram_id = "ddr";
return map->reserved.mmio_start;
}
+int versal_get_num_cpu(VersalVersion version)
+{
+ const VersalMap *map = VERSION_TO_MAP[version];
+
+ return map->apu.num_cluster * map->apu.num_core
+ + map->rpu.num_cluster * map->rpu.num_core;
+}
+
int versal_get_num_can(VersalVersion version)
{
const VersalMap *map = VERSION_TO_MAP[version];
qemu_irq versal_get_reserved_irq(Versal *s, int idx, int *dtb_idx);
hwaddr versal_get_reserved_mmio_addr(Versal *s);
+int versal_get_num_cpu(VersalVersion version);
int versal_get_num_can(VersalVersion version);
int versal_get_num_sdhci(VersalVersion version);