qw0 = HISI_SAS_DEV_TYPE_SATA << ITCT_HDR_DEV_TYPE_OFF;
break;
default:
- dev_warn(dev, "setup itct: unsupported dev type (%d)\n",
+ dev_warn(dev, "setup itct: unsupported dev type (%u)\n",
sas_dev->dev_type);
}
static ssize_t intr_conv_v3_hw_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
- return scnprintf(buf, PAGE_SIZE, "%u\n", hisi_sas_intr_conv);
+ return scnprintf(buf, PAGE_SIZE, "%d\n", hisi_sas_intr_conv);
}
static DEVICE_ATTR_RO(intr_conv_v3_hw);
u32 *fix_code = &hisi_hba->debugfs_bist_fixed_code[0];
struct device *dev = hisi_hba->dev;
- dev_info(dev, "BIST info:phy%d link_rate=%d code_mode=%d path_mode=%d ffe={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x} fixed_code={0x%x, 0x%x}\n",
+ dev_info(dev, "BIST info:phy%u link_rate=%u code_mode=%u path_mode=%u ffe={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x} fixed_code={0x%x, 0x%x}\n",
phy_no, linkrate, code_mode, path_mode,
ffe[FFE_SAS_1_5_GBPS], ffe[FFE_SAS_3_0_GBPS],
ffe[FFE_SAS_6_0_GBPS], ffe[FFE_SAS_12_0_GBPS],
int i;
for (i = 0; i < reg->count; i++) {
- int off = i * HISI_SAS_REG_MEM_SIZE;
+ u32 off = i * HISI_SAS_REG_MEM_SIZE;
const char *name;
name = debugfs_to_reg_name_v3_hw(off, reg->base_off,