dts: zynqmp: mini_nand: Add dts file for zynqMP mini nand

Add dts file for zynqMP mini nand, This will be
used for ZynqMP mini uboot support for Nand

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index bc730c637db4e09360d8421c952d10429c78e361..1d73a8ec11d35390917fade537ab0cf1e6c3879c 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -72,7 +72,8 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-ep108.dtb \
        zynqmp-zc1751-xm015-dc1.dtb             \
        zynqmp-zc1751-xm016-dc2.dtb             \
        zynqmp-zc1751-xm019-dc5.dtb             \
-       zynqmp-mini-qspi.dtb
+       zynqmp-mini-qspi.dtb                    \
+       zynqmp-mini-nand.dtb
 dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-evm.dtb
 
 dtb-$(CONFIG_ARCH_SOCFPGA) +=                          \

diff --git a/arch/arm/dts/zynqmp-mini-nand.dts b/arch/arm/dts/zynqmp-mini-nand.dts
new file mode 100644 (file)
index 0000000..0e02e76
--- /dev/null
+++ b/arch/arm/dts/zynqmp-mini-nand.dts
@@ -0,0 +1,114 @@
+/*
+ * dts file for Xilinx ZynqMP Mini Configuration
+ *
+ * (C) Copyright 2015, Xilinx, Inc.
+ *
+ * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+/dts-v1/;
+
+/ {
+       model = "ZynqMP MINI NAND";
+       compatible = "xlnx,zynqmp";
+       #address-cells = <2>;
+       #size-cells = <1>;
+
+       aliases {
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory {
+               device_type = "memory";
+               reg = <0x0 0x0 0x40000000>;
+       };
+
+       amba: amba {
+               compatible = "simple-bus";
+               #address-cells = <2>;
+               #size-cells = <1>;
+               ranges;
+
+               nand0: nand@ff100000 {
+                       compatible = "arasan,nfc-v3p10";
+                       status = "okay";
+                       reg = <0x0 0xff100000 0x1000>;
+                       clock-names = "clk_sys", "clk_flash";
+                       #address-cells = <2>;
+                       #size-cells = <1>;
+                       arasan,has-mdma;
+                       num-cs = <2>;
+
+                       partition@0 {   /* for testing purpose */
+                               label = "nand-fsbl-uboot";
+                               reg = <0x0 0x0 0x400000>;
+                       };
+                       partition@1 {   /* for testing purpose */
+                               label = "nand-linux";
+                               reg = <0x0 0x400000 0x1400000>;
+                       };
+                       partition@2 {   /* for testing purpose */
+                               label = "nand-device-tree";
+                               reg = <0x0 0x1800000 0x400000>;
+                       };
+                       partition@3 {   /* for testing purpose */
+                               label = "nand-rootfs";
+                               reg = <0x0 0x1C00000 0x1400000>;
+                       };
+                       partition@4 {   /* for testing purpose */
+                               label = "nand-bitstream";
+                               reg = <0x0 0x3000000 0x400000>;
+                       };
+                       partition@5 {   /* for testing purpose */
+                               label = "nand-misc";
+                               reg = <0x0 0x3400000 0xFCC00000>;
+                       };
+                       partition@6 {   /* for testing purpose */
+                               label = "nand1-fsbl-uboot";
+                               reg = <0x1 0x0 0x400000>;
+                       };
+                       partition@7 {   /* for testing purpose */
+                               label = "nand1-linux";
+                               reg = <0x1 0x400000 0x1400000>;
+                       };
+                       partition@8 {   /* for testing purpose */
+                               label = "nand1-device-tree";
+                               reg = <0x1 0x1800000 0x400000>;
+                       };
+                       partition@9 {   /* for testing purpose */
+                               label = "nand1-rootfs";
+                               reg = <0x1 0x1C00000 0x1400000>;
+                       };
+                       partition@10 {  /* for testing purpose */
+                               label = "nand1-bitstream";
+                               reg = <0x1 0x3000000 0x400000>;
+                       };
+                       partition@11 {  /* for testing purpose */
+                               label = "nand1-misc";
+                               reg = <0x1 0x3400000 0xFCC00000>;
+                       };
+               };
+
+               uart0: serial@ff000000 {
+                       compatible = "cdns,uart-r1p12";
+                       status = "okay";
+                       reg = <0x0 0xff000000 0x1000>;
+                       clock-names = "uart_clk", "pclk";
+                       clocks = <&misc_clk &misc_clk>;
+               };
+
+               misc_clk: misc_clk {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <25000000>;
+               };
+
+       };
+};