drm/amd/pm/ci: Use highest MCLK on CI when MCLK DPM is disabled

When MCLK DPM is disabled for any reason, populate the MCLK
table with the highest MCLK DPM level, so that the ASIC can
use the highest possible memory clock to get good performance
even when MCLK DPM is disabled.

Fixes: 9f4b35411cfe ("drm/amd/powerplay: add CI asics support to smumgr (v3)")
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
index 62ebec1c6fe3c31c688724edf4650cb61cce6942..a09ca13df39981a31f11f0787dd94f7965877bc4 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
@@ -1322,6 +1322,14 @@ static int ci_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
                        return result;
        }
 
+       if (data->mclk_dpm_key_disabled && dpm_table->mclk_table.count) {
+               /* Populate the table with the highest MCLK level when MCLK DPM is disabled */
+               for (i = 0; i < dpm_table->mclk_table.count - 1; i++) {
+                       levels[i] = levels[dpm_table->mclk_table.count - 1];
+                       levels[i].DisplayWatermark = PPSMC_DISPLAY_WATERMARK_HIGH;
+               }
+       }
+
        smu_data->smc_state_table.MemoryLevel[0].EnabledForActivity = 1;
 
        dev_id = adev->pdev->device;