drop queue-5.10/drm-i915-display-fix-the-12-bpc-bits-for-pipe_misc-reg.patch

diff --git a/queue-5.10/drm-i915-display-fix-the-12-bpc-bits-for-pipe_misc-reg.patch b/queue-5.10/drm-i915-display-fix-the-12-bpc-bits-for-pipe_misc-reg.patch
deleted file mode 100644 (file)
index a08a925..0000000
--- a/queue-5.10/drm-i915-display-fix-the-12-bpc-bits-for-pipe_misc-reg.patch
+++ /dev/null
@@ -1,134 +0,0 @@
-From abd9d66a055722393d33685214c08386694871d7 Mon Sep 17 00:00:00 2001
-From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
-Date: Wed, 11 Aug 2021 10:48:57 +0530
-Subject: drm/i915/display: Fix the 12 BPC bits for PIPE_MISC reg
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
-
-commit abd9d66a055722393d33685214c08386694871d7 upstream.
-
-Till DISPLAY12 the PIPE_MISC bits 5-7 are used to set the
-Dithering BPC, with valid values of 6, 8, 10 BPC.
-For ADLP+ these bits are used to set the PORT OUTPUT BPC, with valid
-values of: 6, 8, 10, 12 BPC, and need to be programmed whether
-dithering is enabled or not.
-
-This patch:
--corrects the bits 5-7 for PIPE MISC register for 12 BPC.
--renames the bits and mask to have generic names for these bits for
-dithering bpc and port output bpc.
-
-v3: Added a note for MIPI DSI which uses the PIPE_MISC for readout
-for pipe_bpp. (Uma Shankar)
-
-v2: Added 'display' to the subject and fixes tag. (Uma Shankar)
-
-Fixes: 756f85cffef2 ("drm/i915/bdw: Broadwell has PIPEMISC")
-Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1)
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
-Cc: Jani Nikula <jani.nikula@linux.intel.com>
-Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
-Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
-Cc: intel-gfx@lists.freedesktop.org
-Cc: <stable@vger.kernel.org> # v3.13+
-
-Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
-Reviewed-by: Uma Shankar <uma.shankar@intel.com>
-Signed-off-by: Uma Shankar <uma.shankar@intel.com>
-Link: https://patchwork.freedesktop.org/patch/msgid/20210811051857.109723-1-ankit.k.nautiyal@intel.com
-(cherry picked from commit 70418a68713c13da3f36c388087d0220b456a430)
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/gpu/drm/i915/display/intel_display.c |   34 +++++++++++++++++++--------
- drivers/gpu/drm/i915/i915_reg.h              |   16 ++++++++----
- 2 files changed, 35 insertions(+), 15 deletions(-)
-
---- a/drivers/gpu/drm/i915/display/intel_display.c
-+++ b/drivers/gpu/drm/i915/display/intel_display.c
-@@ -10173,16 +10173,18 @@ static void bdw_set_pipemisc(const struc
- 
-       switch (crtc_state->pipe_bpp) {
-       case 18:
--              val |= PIPEMISC_DITHER_6_BPC;
-+              val |= PIPEMISC_6_BPC;
-               break;
-       case 24:
--              val |= PIPEMISC_DITHER_8_BPC;
-+              val |= PIPEMISC_8_BPC;
-               break;
-       case 30:
--              val |= PIPEMISC_DITHER_10_BPC;
-+              val |= PIPEMISC_10_BPC;
-               break;
-       case 36:
--              val |= PIPEMISC_DITHER_12_BPC;
-+              /* Port output 12BPC defined for ADLP+ */
-+              if (DISPLAY_VER(dev_priv) > 12)
-+                      val |= PIPEMISC_12_BPC_ADLP;
-               break;
-       default:
-               MISSING_CASE(crtc_state->pipe_bpp);
-@@ -10218,15 +10220,27 @@ int bdw_get_pipemisc_bpp(struct intel_cr
- 
-       tmp = intel_de_read(dev_priv, PIPEMISC(crtc->pipe));
- 
--      switch (tmp & PIPEMISC_DITHER_BPC_MASK) {
--      case PIPEMISC_DITHER_6_BPC:
-+      switch (tmp & PIPEMISC_BPC_MASK) {
-+      case PIPEMISC_6_BPC:
-               return 18;
--      case PIPEMISC_DITHER_8_BPC:
-+      case PIPEMISC_8_BPC:
-               return 24;
--      case PIPEMISC_DITHER_10_BPC:
-+      case PIPEMISC_10_BPC:
-               return 30;
--      case PIPEMISC_DITHER_12_BPC:
--              return 36;
-+      /*
-+       * PORT OUTPUT 12 BPC defined for ADLP+.
-+       *
-+       * TODO:
-+       * For previous platforms with DSI interface, bits 5:7
-+       * are used for storing pipe_bpp irrespective of dithering.
-+       * Since the value of 12 BPC is not defined for these bits
-+       * on older platforms, need to find a workaround for 12 BPC
-+       * MIPI DSI HW readout.
-+       */
-+      case PIPEMISC_12_BPC_ADLP:
-+              if (DISPLAY_VER(dev_priv) > 12)
-+                      return 36;
-+              fallthrough;
-       default:
-               MISSING_CASE(tmp);
-               return 0;
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -6011,11 +6011,17 @@ enum {
- #define   PIPEMISC_HDR_MODE_PRECISION (1 << 23) /* icl+ */
- #define   PIPEMISC_OUTPUT_COLORSPACE_YUV  (1 << 11)
- #define   PIPEMISC_PIXEL_ROUNDING_TRUNC       REG_BIT(8) /* tgl+ */
--#define   PIPEMISC_DITHER_BPC_MASK    (7 << 5)
--#define   PIPEMISC_DITHER_8_BPC               (0 << 5)
--#define   PIPEMISC_DITHER_10_BPC      (1 << 5)
--#define   PIPEMISC_DITHER_6_BPC               (2 << 5)
--#define   PIPEMISC_DITHER_12_BPC      (3 << 5)
-+/*
-+ * For Display < 13, Bits 5-7 of PIPE MISC represent DITHER BPC with
-+ * valid values of: 6, 8, 10 BPC.
-+ * ADLP+, the bits 5-7 represent PORT OUTPUT BPC with valid values of:
-+ * 6, 8, 10, 12 BPC.
-+ */
-+#define   PIPEMISC_BPC_MASK           (7 << 5)
-+#define   PIPEMISC_8_BPC              (0 << 5)
-+#define   PIPEMISC_10_BPC             (1 << 5)
-+#define   PIPEMISC_6_BPC              (2 << 5)
-+#define   PIPEMISC_12_BPC_ADLP                (4 << 5) /* adlp+ */
- #define   PIPEMISC_DITHER_ENABLE      (1 << 4)
- #define   PIPEMISC_DITHER_TYPE_MASK   (3 << 2)
- #define   PIPEMISC_DITHER_TYPE_SP     (0 << 2)

diff --git a/queue-5.10/series b/queue-5.10/series
index 6aa9bab2e6f47e65bf36826a3c90991d957cd025..62eee706d3cb8851980e616481dbd67ad767c5a6 100644 (file)
--- a/queue-5.10/series
+++ b/queue-5.10/series
@@ -16,7 +16,6 @@ arc-fp-set-fpu_status.fwe-to-enable-fpu_status-update-on-context-switch.patch
 ceph-reduce-contention-in-ceph_check_delayed_caps.patch
 acpi-nfit-fix-support-for-virtual-spa-ranges.patch
 libnvdimm-region-fix-label-activation-vs-errors.patch
-drm-i915-display-fix-the-12-bpc-bits-for-pipe_misc-reg.patch
 drm-amd-display-remove-invalid-assert-for-odm-mpc-case.patch
 drm-amd-display-use-gfp_atomic-in-amdgpu_dm_irq_schedule_work.patch
 drm-amdgpu-don-t-enable-baco-on-boco-platforms-in-runpm.patch