]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
6.12-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 13 Apr 2026 10:46:24 +0000 (12:46 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 13 Apr 2026 10:46:24 +0000 (12:46 +0200)
added patches:
arm64-dts-renesas-white-hawk-cpu-common-add-pin-control-for-dsi-edp-irq.patch

queue-6.12/arm64-dts-renesas-white-hawk-cpu-common-add-pin-control-for-dsi-edp-irq.patch [new file with mode: 0644]
queue-6.12/series

diff --git a/queue-6.12/arm64-dts-renesas-white-hawk-cpu-common-add-pin-control-for-dsi-edp-irq.patch b/queue-6.12/arm64-dts-renesas-white-hawk-cpu-common-add-pin-control-for-dsi-edp-irq.patch
new file mode 100644 (file)
index 0000000..2f5f4c3
--- /dev/null
@@ -0,0 +1,48 @@
+From 8219a455efd4ba11c1d30c1bbc9ce853466c19bf Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 18 Oct 2024 10:39:55 +0200
+Subject: arm64: dts: renesas: white-hawk-cpu-common: Add pin control for DSI-eDP IRQ
+
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+
+commit 8219a455efd4ba11c1d30c1bbc9ce853466c19bf upstream.
+
+When the DSI to eDP bridge was added, pin control for the IRQ pin was
+left out, because the pin controller did not support INTC-EX pins yet.
+
+Commit 10544ec1b3436037 ("pinctrl: renesas: r8a779g0: Add INTC-EX
+pins, groups, and function") added support for these pins, so add the
+missing pin control description.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Link: https://lore.kernel.org/89bab2008891be1f003a3c0dbcdf36af3b98da70.1729240573.git.geert+renesas@glider.be
+Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi |    8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi
++++ b/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi
+@@ -239,6 +239,9 @@
+       clock-frequency = <400000>;
+       bridge@2c {
++              pinctrl-0 = <&irq0_pins>;
++              pinctrl-names = "default";
++
+               compatible = "ti,sn65dsi86";
+               reg = <0x2c>;
+@@ -343,6 +346,11 @@
+               function = "i2c1";
+       };
++      irq0_pins: irq0 {
++              groups = "intc_ex_irq0_a";
++              function = "intc_ex";
++      };
++
+       keys_pins: keys {
+               pins = "GP_5_0", "GP_5_1", "GP_5_2";
+               bias-pull-up;
index a1906f47697f577874e026815e7f74c253599e2c..0ad51ccfbfc9fc283f9d15451efca8abc55fd3e3 100644 (file)
@@ -20,3 +20,4 @@ btrfs-remove-pointless-out-labels-from-extent-tree.c.patch
 btrfs-fix-incorrect-return-value-after-changing-leaf.patch
 blktrace-fix-__this_cpu_read-write-in-preemptible-co.patch
 nfc-nci-complete-pending-data-exchange-on-device-clo.patch
+arm64-dts-renesas-white-hawk-cpu-common-add-pin-control-for-dsi-edp-irq.patch