--- /dev/null
+From 40478455fefdc0bde24ae872c3f88d58a1b0e435 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
+Date: Thu, 27 Mar 2014 11:08:45 +0200
+Subject: drm/i915: Allow user modes to exceed DVI 165MHz limit
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
+
+commit 40478455fefdc0bde24ae872c3f88d58a1b0e435 upstream.
+
+In commit
+ commit 6375b768a9850b6154478993e5fb566fa4614a9c
+ Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
+ Date: Mon Mar 3 11:33:36 2014 +0200
+
+ drm/i915: Reject >165MHz modes w/ DVI monitors
+
+the driver started to filter out display modes which exceed the
+single-link DVI 165Mz dotclock limits when the monitor doesn't report
+itself as being HDMI compliant. The intent was to filter out all
+EDID derived modes that require dual-link DVI to operate since we
+don't support dual-link.
+
+However the patch went a bit too far and also causes the driver to reject
+such modes even when specified by the user. Normally we don't check the
+sink limitations when setting a mode from the user. This allows the user
+to specify any mode whether the sink reports to support it or not. This
+can be useful since often the sinks support more modes than they report
+in the EDID.
+
+So relax the checks a bit, and apply the single-link DVI dotclock limit
+only when filtering the mode list, and ignore the limit when setting
+a user specified mode.
+
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=72961
+Tested-by: Nicholas Vinson <nvinson@comcast.net>
+Reviewed-by: Daniel Vetter <daniel@ffwll.ch>
+Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_hdmi.c | 9 +++++----
+ 1 file changed, 5 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_hdmi.c
++++ b/drivers/gpu/drm/i915/intel_hdmi.c
+@@ -841,11 +841,11 @@ static void intel_disable_hdmi(struct in
+ }
+ }
+
+-static int hdmi_portclock_limit(struct intel_hdmi *hdmi)
++static int hdmi_portclock_limit(struct intel_hdmi *hdmi, bool respect_dvi_limit)
+ {
+ struct drm_device *dev = intel_hdmi_to_dev(hdmi);
+
+- if (!hdmi->has_hdmi_sink || IS_G4X(dev))
++ if ((respect_dvi_limit && !hdmi->has_hdmi_sink) || IS_G4X(dev))
+ return 165000;
+ else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8)
+ return 300000;
+@@ -857,7 +857,8 @@ static enum drm_mode_status
+ intel_hdmi_mode_valid(struct drm_connector *connector,
+ struct drm_display_mode *mode)
+ {
+- if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector)))
++ if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector),
++ true))
+ return MODE_CLOCK_HIGH;
+ if (mode->clock < 20000)
+ return MODE_CLOCK_LOW;
+@@ -875,7 +876,7 @@ bool intel_hdmi_compute_config(struct in
+ struct drm_device *dev = encoder->base.dev;
+ struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
+ int clock_12bpc = pipe_config->adjusted_mode.crtc_clock * 3 / 2;
+- int portclock_limit = hdmi_portclock_limit(intel_hdmi);
++ int portclock_limit = hdmi_portclock_limit(intel_hdmi, false);
+ int desired_bpp;
+
+ if (intel_hdmi->color_range_auto) {