obj-y += slcr.o
obj-y += clk.o
obj-y += lowlevel_init.o
+obj-$(CONFIG_SPL_BUILD) += spl.o
int arch_cpu_init(void)
{
zynq_slcr_unlock();
-
+#ifndef CONFIG_SPL_BUILD
/* Device config APB, unlock the PCAP */
writel(0x757BDF0D, &devcfg_base->unlock);
writel(0xFFFFFFFF, &devcfg_base->rom_shadow);
/* Urgent write, ports S2/S3 */
writel(0xC, &slcr_base->ddr_urgent);
#endif
-
+#endif
zynq_clk_early_init();
zynq_slcr_lock();
--- /dev/null
+/*
+ * (C) Copyright 2014 Xilinx, Inc. Michal Simek
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <spl.h>
+
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/spl.h>
+#include <asm/arch/sys_proto.h>
+
+__weak void ps7_init(void)
+{
+ puts("Please copy ps7_init.c/h from hw project\n");
+}
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void board_init_f(ulong dummy)
+{
+ /* Clear the BSS. */
+ memset(__bss_start, 0, __bss_end - __bss_start);
+
+ /* Set global data pointer. */
+ gd = &gdata;
+
+ ps7_init();
+
+ preloader_console_init();
+ arch_cpu_init();
+ board_init_r(NULL, 0);
+}
+
+u32 spl_boot_device(void)
+{
+ u32 mode;
+
+ switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
+#ifdef CONFIG_SPL_SPI_SUPPORT
+ case ZYNQ_BM_QSPI:
+ puts("qspi boot\n");
+ mode = BOOT_DEVICE_SPI;
+ break;
+#endif
+ case ZYNQ_BM_NAND:
+ mode = BOOT_DEVICE_NAND;
+ break;
+ case ZYNQ_BM_NOR:
+ mode = BOOT_DEVICE_NOR;
+ break;
+#ifdef CONFIG_SPL_MMC_SUPPORT
+ case ZYNQ_BM_SD:
+ puts("mmc boot\n");
+ mode = BOOT_DEVICE_MMC1;
+ break;
+#endif
+ case ZYNQ_BM_JTAG:
+ mode = BOOT_DEVICE_RAM;
+ break;
+ default:
+ puts("Unsupported boot mode selected\n");
+ hang();
+ }
+
+ return mode;
+}
+
+#ifdef CONFIG_SPL_MMC_SUPPORT
+u32 spl_boot_mode(void)
+{
+ return MMCSD_MODE_FAT;
+}
+#endif
--- /dev/null
+/*
+ * Copyright (c) 2014 Xilinx, Inc. Michal Simek
+ * Copyright (c) 2004-2008 Texas Instruments
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = CONFIG_SPL_TEXT_BASE;
+
+ . = ALIGN(4);
+ .text :
+ {
+ __image_copy_start = .;
+ CPUDIR/start.o (.text*)
+ *(.text*)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
+
+ . = ALIGN(4);
+ .data : {
+ *(.data*)
+ }
+
+ . = ALIGN(4);
+
+ . = .;
+
+ __image_copy_end = .;
+
+ .rel.dyn : {
+ __rel_dyn_start = .;
+ *(.rel*)
+ __rel_dyn_end = .;
+ }
+
+ _end = .;
+
+ .bss __rel_dyn_start (OVERLAY) : {
+ __bss_start = .;
+ *(.bss*)
+ . = ALIGN(4);
+ __bss_end = .;
+ }
+
+ /DISCARD/ : { *(.dynsym) }
+ /DISCARD/ : { *(.dynstr*) }
+ /DISCARD/ : { *(.dynamic*) }
+ /DISCARD/ : { *(.plt*) }
+ /DISCARD/ : { *(.interp*) }
+ /DISCARD/ : { *(.gnu*) }
+
+ /* Just random address above 1MB */
+ /* There is something wrong in fat implementation */
+ . = 0x100000;
+ .ddr (NOLOAD) : {
+ __ddr_start = .;
+ *(.ddr*)
+ . = ALIGN(4);
+ __ddr_end = .;
+ }
+}
+
+#if defined(CONFIG_SPL_MAX_SIZE)
+ASSERT(__image_copy_end - __image_copy_start < (CONFIG_SPL_MAX_SIZE), \
+ "SPL image too big");
+#endif
+
+#if defined(CONFIG_SPL_BSS_MAX_SIZE)
+ASSERT(__bss_end - __bss_start < (CONFIG_SPL_BSS_MAX_SIZE), \
+ "SPL image BSS too big");
+#endif
+
+#if defined(CONFIG_SPL_MAX_FOOTPRINT)
+ASSERT(__bss_end - _start < (CONFIG_SPL_MAX_FOOTPRINT), \
+ "SPL image plus BSS too big");
+#endif
--- /dev/null
+/*
+ * (C) Copyright 2014 Xilinx, Inc. Michal Simek
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#ifndef _ASM_ARCH_SPL_H_
+#define _ASM_ARCH_SPL_H_
+
+#define BOOT_DEVICE_NONE 0
+#define BOOT_DEVICE_RAM 1
+#define BOOT_DEVICE_SPI 2
+#define BOOT_DEVICE_MMC1 3
+#define BOOT_DEVICE_MMC2 4
+#define BOOT_DEVICE_MMC2_2 5
+
+/* Not supported now */
+#define BOOT_DEVICE_NAND 6
+#define BOOT_DEVICE_NOR 7
+#define BOOT_DEVICE_I2C 8
+#define BOOT_DEVICE_CPGMAC 9
+
+#endif
#
obj-y := board.o
+
+ifneq ($(wildcard ps7_init.c),)
+ifneq ($(wildcard ps7_init.h),)
+obj-$(CONFIG_SPL_BUILD) += ps7_init.o
+ifeq ($(CONFIG_SPL_BUILD),y)
+$(shell touch xil_io.h)
+endif
+endif
+endif
* into 'buffer'.
* Return the number of bytes read or -1 on fatal errors.
*/
+#if defined(CONFIG_ZYNQ) && defined(CONFIG_SPL_BUILD)
+__section(.ddr)
+#endif
__u8 get_contents_vfatname_block[MAX_CLUSTSIZE]
__aligned(ARCH_DMA_MINALIGN);
* Get the directory entry associated with 'filename' from the directory
* starting at 'startsect'
*/
+#if defined(CONFIG_ZYNQ) && defined(CONFIG_SPL_BUILD)
+__section(.ddr)
+#endif
__u8 get_dentfromdir_block[MAX_CLUSTSIZE]
__aligned(ARCH_DMA_MINALIGN);
return ret;
}
+#if defined(CONFIG_ZYNQ) && defined(CONFIG_SPL_BUILD)
+__section(.ddr)
+#endif
__u8 do_fat_read_at_block[MAX_CLUSTSIZE]
__aligned(ARCH_DMA_MINALIGN);
# define CONFIG_PANIC_HANG
#endif
+/* SPL part */
+#define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+
+#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot-spl.lds"
+
+/* Disable dcache for SPL just for sure */
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_DCACHE_OFF
+#undef CONFIG_FPGA
+#endif
+
+/* MMC support */
+#ifdef CONFIG_ZYNQ_SDHCI0
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_FAT_SUPPORT
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
+#endif
+
+/* qspi mode is working fine */
+#ifdef CONFIG_ZYNQ_QSPI
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_BUS 0
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
+#define CONFIG_SPL_SPI_CS 0
+#endif
+
+#ifdef DEBUG
+#define CONFIG_SPL_RAM_DEVICE
+#define CONFIG_SPL_NET_SUPPORT
+#define CONFIG_SPL_ETH_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_ETH_DEVICE "Gem.e000b000"
+
+/* for booting directly linux */
+#define CONFIG_SPL_OS_BOOT
+#endif
+
+/* SP location before relocation, must use scratch RAM */
+#define CONFIG_SPL_TEXT_BASE 0x0
+
+/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
+#define CONFIG_SPL_MAX_FOOTPRINT 0x30000
+
+/* The highest 64k OCM address */
+#define OCM_HIGH_ADDR 0xffff0000
+
+/* Just define any reasonable size */
+#define CONFIG_SPL_STACK_SIZE 0x1000
+
+/* SPL stack position - and stack goes down */
+#define CONFIG_SPL_STACK (OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE)
+
+/* On the top of OCM space */
+#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_STACK + \
+ GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000
+
+/* These two can't be more than 0xffffff2c */
+/* CONFIG_SYS_SPL_MALLOC_START + CONFIG_SYS_SPL_MALLOC_SIZE */
+
#endif /* __CONFIG_ZYNQ_COMMON_H */
projects / thirdparty / u-boot.git / commitdiff
