Xilinx: ARM: Added DDR initialization for PEEP8 with 256 MB

Linux needs to test with more memory.  This will probably not run
with previous PEEP designs. Conditional compilation was added to
deal with that.

diff --git a/board/xilinx/dfe/lowlevel_init.S b/board/xilinx/dfe/lowlevel_init.S
index 04325a8e7bf1a17a7ae23e5022ee93ce6bf3f9ec..6ed24481ca8953b58c0a44ed4590f187a948f0f6 100755 (executable)
--- a/board/xilinx/dfe/lowlevel_init.S
+++ b/board/xilinx/dfe/lowlevel_init.S
@@ -106,6 +106,23 @@ doit:
        ldr r2, =0x00020022
        str r2, [r1]
 
+#if (XPAR_MEMORY_MB_SIZE == 256)
+/* 
+ * starting with PEEP8 designs, there is 256 MB 
+ */
+       ldr r1, =(XPSS_DDR_CTRL_BASEADDR + 0x3C)
+       ldr r2, =0x00000F88
+       str r2, [r1]
+
+       ldr r1, =(XPSS_DDR_CTRL_BASEADDR + 0x40)
+       ldr r2, =0xFF000000
+       str r2, [r1]
+
+       ldr r1, =(XPSS_DDR_CTRL_BASEADDR + 0x44)
+       ldr r2, =0x0FF33333
+       str r2, [r1]
+#endif
+
        ldr r1, =(XPSS_DDR_CTRL_BASEADDR + 0x50)
        ldr r2, =0x00000256
        str r2, [r1]

diff --git a/board/xilinx/dfe/xparameters.h b/board/xilinx/dfe/xparameters.h
index 386a79907283a5d02070edad78656d0d43cf2e2d..64aa3bf9429bdac901cc67cb2b1b8fd7cead4871 100755 (executable)
--- a/board/xilinx/dfe/xparameters.h
+++ b/board/xilinx/dfe/xparameters.h
@@ -9,6 +9,15 @@
 #define XPAR_DDR2_SDRAM_MEM_BASEADDR   0x00000000
 #define XPAR_DDR2_SDRAM_MEM_HIGHADDR   0x00FFFFFF
 
+/* starting with PEEP8 designs, there is 256 MB of DDR */
+
+#define RTL_45
+#ifdef RTL_45
+#define XPAR_MEMORY_MB_SIZE            256
+#else
+#define XPAR_MEMORY_MB_SIZE            128
+#endif
+
 /* SCU Timer */
 #define XPAR_SCUTIMER_NUM_INSTANCES    1
 #define XPAR_SCUTIMER_DEVICE_ID                0