drm/i915/de: Use intel_de_wait_ms() for the obvious cases

Replace some users of intel_de_wait_custom() with intel_de_wait_ms().

This includes the cases where we pass in the default 2 microsecond
fast timeout, which is also what intel_de_wait_ms() uses so there
are no functional changes here.

Done with cocci (with manual formatting fixes):
@@
expression display, reg, mask, value, timeout_ms, out_value;
@@
- intel_de_wait_custom(display, reg, mask, value, 2, timeout_ms, out_value)
+ intel_de_wait_ms(display, reg, mask, value, timeout_ms, out_value)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20251110172756.2132-7-ville.syrjala@linux.intel.com
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index af97bd42495b0ad9fc107dd0e75709ff7a5088b2..55fd95994ea79af427e3cc5fd4fd2f926e435f0d 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -164,11 +164,10 @@ int intel_cx0_wait_for_ack(struct intel_encoder *encoder,
        enum port port = encoder->port;
        enum phy phy = intel_encoder_to_phy(encoder);
 
-       if (intel_de_wait_custom(display,
-                                XELPDP_PORT_P2M_MSGBUS_STATUS(display, port, lane),
-                                XELPDP_PORT_P2M_RESPONSE_READY,
-                                XELPDP_PORT_P2M_RESPONSE_READY,
-                                2, XELPDP_MSGBUS_TIMEOUT_MS, val)) {
+       if (intel_de_wait_ms(display, XELPDP_PORT_P2M_MSGBUS_STATUS(display, port, lane),
+                            XELPDP_PORT_P2M_RESPONSE_READY,
+                            XELPDP_PORT_P2M_RESPONSE_READY,
+                            XELPDP_MSGBUS_TIMEOUT_MS, val)) {
                drm_dbg_kms(display->drm,
                            "PHY %c Timeout waiting for message ACK. Status: 0x%x\n",
                            phy_name(phy), *val);
@@ -2827,9 +2826,9 @@ void intel_cx0_powerdown_change_sequence(struct intel_encoder *encoder,
                     intel_cx0_get_powerdown_update(lane_mask));
 
        /* Update Timeout Value */
-       if (intel_de_wait_custom(display, buf_ctl2_reg,
-                                intel_cx0_get_powerdown_update(lane_mask), 0,
-                                2, XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_MS, NULL))
+       if (intel_de_wait_ms(display, buf_ctl2_reg,
+                            intel_cx0_get_powerdown_update(lane_mask), 0,
+                            XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_MS, NULL))
                drm_warn(display->drm,
                         "PHY %c failed to bring out of lane reset\n",
                         phy_name(phy));

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index 2e7dbaf511b9d69d2c0c0c307d4b1ab42a1bcc4a..809799f63e326b310d65d01a461312937a9b6605 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -62,9 +62,9 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp)
        u32 status;
        int ret;
 
-       ret = intel_de_wait_custom(display, ch_ctl, DP_AUX_CH_CTL_SEND_BUSY,
-                                  0,
-                                  2, timeout_ms, &status);
+       ret = intel_de_wait_ms(display, ch_ctl,
+                              DP_AUX_CH_CTL_SEND_BUSY, 0,
+                              timeout_ms, &status);
 
        if (ret == -ETIMEDOUT)
                drm_err(display->drm,

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 78c34466e40227c2b8c485a930f66f2eecaabac7..5e1a96223a9ce24e7094ec334511845f5e70487a 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -410,9 +410,8 @@ static int intel_hdcp_load_keys(struct intel_display *display)
        }
 
        /* Wait for the keys to load (500us) */
-       ret = intel_de_wait_custom(display, HDCP_KEY_STATUS,
-                                  HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE,
-                                  2, 1, &val);
+       ret = intel_de_wait_ms(display, HDCP_KEY_STATUS, HDCP_KEY_LOAD_DONE,
+                              HDCP_KEY_LOAD_DONE, 1, &val);
        if (ret)
                return ret;
        else if (!(val & HDCP_KEY_LOAD_STATUS))

diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
index 243fca1c6a2d57e39b23258e83168c0895164015..ac6f611075288bb48d9bf148a89a4c830e92274c 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
@@ -1201,10 +1201,9 @@ intel_lt_phy_lane_reset(struct intel_encoder *encoder,
                     XELPDP_LANE_PCLK_PLL_REQUEST(0),
                     XELPDP_LANE_PCLK_PLL_REQUEST(0));
 
-       if (intel_de_wait_custom(display, XELPDP_PORT_CLOCK_CTL(display, port),
-                                XELPDP_LANE_PCLK_PLL_ACK(0),
-                                XELPDP_LANE_PCLK_PLL_ACK(0),
-                                2, XE3PLPD_MACCLK_TURNON_LATENCY_MS, NULL))
+       if (intel_de_wait_ms(display, XELPDP_PORT_CLOCK_CTL(display, port),
+                            XELPDP_LANE_PCLK_PLL_ACK(0), XELPDP_LANE_PCLK_PLL_ACK(0),
+                            XE3PLPD_MACCLK_TURNON_LATENCY_MS, NULL))
                drm_warn(display->drm, "PHY %c PLL MacCLK assertion ack not done\n",
                         phy_name(phy));
 
@@ -1215,15 +1214,15 @@ intel_lt_phy_lane_reset(struct intel_encoder *encoder,
        intel_de_rmw(display, XELPDP_PORT_BUF_CTL2(display, port),
                     lane_pipe_reset | lane_phy_pulse_status, 0);
 
-       if (intel_de_wait_custom(display, XELPDP_PORT_BUF_CTL2(display, port),
-                                lane_phy_current_status, 0,
-                                2, XE3PLPD_RESET_END_LATENCY_MS, NULL))
+       if (intel_de_wait_ms(display, XELPDP_PORT_BUF_CTL2(display, port),
+                            lane_phy_current_status, 0,
+                            XE3PLPD_RESET_END_LATENCY_MS, NULL))
                drm_warn(display->drm, "PHY %c failed to bring out of lane reset\n",
                         phy_name(phy));
 
-       if (intel_de_wait_custom(display, XELPDP_PORT_BUF_CTL2(display, port),
-                                lane_phy_pulse_status, lane_phy_pulse_status,
-                                2, XE3PLPD_RATE_CALIB_DONE_LATENCY_MS, NULL))
+       if (intel_de_wait_ms(display, XELPDP_PORT_BUF_CTL2(display, port),
+                            lane_phy_pulse_status, lane_phy_pulse_status,
+                            XE3PLPD_RATE_CALIB_DONE_LATENCY_MS, NULL))
                drm_warn(display->drm, "PHY %c PLL rate not changed\n",
                         phy_name(phy));
 
@@ -2002,10 +2001,9 @@ void intel_lt_phy_pll_enable(struct intel_encoder *encoder,
                             XELPDP_LANE_PCLK_PLL_REQUEST(0));
 
                /* 12. Poll for PORT_CLOCK_CTL[PCLK PLL Ack LN0]= 1. */
-               if (intel_de_wait_custom(display, XELPDP_PORT_CLOCK_CTL(display, port),
-                                        XELPDP_LANE_PCLK_PLL_ACK(0),
-                                        XELPDP_LANE_PCLK_PLL_ACK(0),
-                                        2, XE3PLPD_MACCLK_TURNON_LATENCY_MS, NULL))
+               if (intel_de_wait_ms(display, XELPDP_PORT_CLOCK_CTL(display, port),
+                                    XELPDP_LANE_PCLK_PLL_ACK(0), XELPDP_LANE_PCLK_PLL_ACK(0),
+                                    XE3PLPD_MACCLK_TURNON_LATENCY_MS, NULL))
                        drm_warn(display->drm, "PHY %c PLL MacCLK ack assertion timeout\n",
                                 phy_name(phy));
 
@@ -2031,9 +2029,9 @@ void intel_lt_phy_pll_enable(struct intel_encoder *encoder,
                                   rate_update, MB_WRITE_COMMITTED);
 
                /* 16. Poll for PORT_BUF_CTL2 register PHY Pulse Status = 1 for Owned PHY Lanes. */
-               if (intel_de_wait_custom(display, XELPDP_PORT_BUF_CTL2(display, port),
-                                        lane_phy_pulse_status, lane_phy_pulse_status,
-                                        2, XE3PLPD_RATE_CALIB_DONE_LATENCY_MS, NULL))
+               if (intel_de_wait_ms(display, XELPDP_PORT_BUF_CTL2(display, port),
+                                    lane_phy_pulse_status, lane_phy_pulse_status,
+                                    XE3PLPD_RATE_CALIB_DONE_LATENCY_MS, NULL))
                        drm_warn(display->drm, "PHY %c PLL rate not changed\n",
                                 phy_name(phy));
 

diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.c b/drivers/gpu/drm/i915/display/intel_pmdemand.c
index 3cc89048b027e5741562e49e1698b8b529f2a696..dc44a7a169c1a92a8916addaf3011efef494381e 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_pmdemand.c
+++ b/drivers/gpu/drm/i915/display/intel_pmdemand.c
@@ -462,9 +462,9 @@ static void intel_pmdemand_poll(struct intel_display *display)
        u32 status;
        int ret;
 
-       ret = intel_de_wait_custom(display, XELPDP_INITIATE_PMDEMAND_REQUEST(1),
-                                  XELPDP_PMDEMAND_REQ_ENABLE, 0,
-                                  2, timeout_ms, &status);
+       ret = intel_de_wait_ms(display, XELPDP_INITIATE_PMDEMAND_REQUEST(1),
+                              XELPDP_PMDEMAND_REQ_ENABLE, 0,
+                              timeout_ms, &status);
 
        if (ret == -ETIMEDOUT)
                drm_err(display->drm,