--- /dev/null
+From 7d3428cd4b2ad51af86fdbdf8284ca38fa95e601 Mon Sep 17 00:00:00 2001
+From: Ilia Mirkin <imirkin@alum.mit.edu>
+Date: Wed, 29 Jan 2014 19:53:00 -0500
+Subject: drm/nouveau: set irq_enabled manually
+
+From: Ilia Mirkin <imirkin@alum.mit.edu>
+
+commit 7d3428cd4b2ad51af86fdbdf8284ca38fa95e601 upstream.
+
+Since commit 0fa9061ae8c ("drm/nouveau/mc: handle irq-related setup
+ourselves"), drm_device->irq_enabled remained unset. This is needed in
+order to properly wait for a vblank event in the generic drm code.
+
+See https://bugs.freedesktop.org/show_bug.cgi?id=74195
+
+Reported-by: Jan Janecek <janjanjanx@gmail.com>
+Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
+Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/nouveau/nouveau_drm.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/gpu/drm/nouveau/nouveau_drm.c
++++ b/drivers/gpu/drm/nouveau/nouveau_drm.c
+@@ -339,6 +339,8 @@ nouveau_drm_load(struct drm_device *dev,
+ if (ret)
+ goto fail_device;
+
++ dev->irq_enabled = true;
++
+ /* workaround an odd issue on nvc1 by disabling the device's
+ * nosnoop capability. hopefully won't cause issues until a
+ * better fix is found - assuming there is one...
+@@ -426,6 +428,7 @@ nouveau_drm_remove(struct pci_dev *pdev)
+ struct nouveau_drm *drm = nouveau_drm(dev);
+ struct nouveau_object *device;
+
++ dev->irq_enabled = false;
+ device = drm->client.base.device;
+ drm_put_dev(dev);
+
--- /dev/null
+From a7f1c1e65b68e1e1ab70898528d5977ed68a0a7d Mon Sep 17 00:00:00 2001
+From: Ilia Mirkin <imirkin@alum.mit.edu>
+Date: Thu, 13 Feb 2014 21:57:15 -0500
+Subject: drm/nv50/disp: use correct register to determine DP display bpp
+
+From: Ilia Mirkin <imirkin@alum.mit.edu>
+
+commit a7f1c1e65b68e1e1ab70898528d5977ed68a0a7d upstream.
+
+Commit 0a0afd282f ("drm/nv50-/disp: move DP link training to core and
+train from supervisor") added code that uses the wrong register for
+computing the display bpp, used for bandwidth calculation. Adjust to use
+the same register as used by exec_clkcmp and nv50_disp_intr_unk20_2_dp.
+
+Reported-by: Torsten Wagner <torsten.wagner@gmail.com>
+Reported-by: Michael Gulick <mgulick@mathworks.com>
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67628
+Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
+Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/nouveau/core/engine/disp/nv50.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
++++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
+@@ -1112,7 +1112,7 @@ nv50_disp_intr_unk20_2(struct nv50_disp_
+ if (conf != ~0) {
+ if (outp.location == 0 && outp.type == DCB_OUTPUT_DP) {
+ u32 soff = (ffs(outp.or) - 1) * 0x08;
+- u32 ctrl = nv_rd32(priv, 0x610798 + soff);
++ u32 ctrl = nv_rd32(priv, 0x610794 + soff);
+ u32 datarate;
+
+ switch ((ctrl & 0x000f0000) >> 16) {