realtek: dsa: common MSTI initialization

The dsa probing currently disable multiple spanning tree for RTL93xx
and keeps the bootloader setup for RTL83xx untouched. Additionally it
does this by checking for the family id. Refactor this to a common
"disable msti" setup.

To make it clear: From now on RTL83xx will also run in MSTI disabled
state. Tested on Linksys LGS310C.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22749
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c
index 2c4fa727d42a3e7dbadbf56a60f741a38ecd7aa8..0544eb1bf64a02b55bcc9731e5b82116b3c42d69 100644 (file)
--- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c
+++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c
@@ -1596,6 +1596,7 @@ static int rtl83xx_sw_probe(struct platform_device *pdev)
        priv->ds->ops = priv->r->switch_ops;
        priv->ds->phylink_mac_ops = priv->r->phylink_mac_ops;
        priv->ds->num_lag_ids = priv->r->num_lag_ids;
+       priv->ds->num_ports = priv->r->cpu_port + 1;
 
        priv->dev = dev;
        dev_set_drvdata(dev, priv);
@@ -1610,15 +1611,7 @@ static int rtl83xx_sw_probe(struct platform_device *pdev)
 
        priv->family_id = soc_info.family;
        priv->id = soc_info.id;
-       switch (soc_info.family) {
-       case RTL9300_FAMILY_ID:
-               sw_w32(0, RTL930X_ST_CTRL);
-               break;
-       case RTL9310_FAMILY_ID:
-               sw_w32(0, RTL931x_ST_CTRL);
-               break;
-       }
-       priv->ds->num_ports = priv->r->cpu_port + 1;
+       sw_w32(0, priv->r->spanning_tree_ctrl);
        priv->irq_mask = GENMASK_ULL(priv->r->cpu_port - 1, 0);
 
        err = rtl83xx_mdio_probe(priv);

diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c
index 5b0cffb7da55b674641702132a7d86725dc8d060..46832a06bb16b1a02fa656c45acda36da096e605 100644 (file)
--- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c
+++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c
@@ -1809,6 +1809,7 @@ int rtldsa_83xx_lag_setup_algomask(struct rtl838x_switch_priv *priv, int group,
 const struct rtldsa_config rtldsa_838x_cfg = {
        .switch_ops = &rtldsa_83xx_switch_ops,
        .phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops,
+       .spanning_tree_ctrl = RTL838X_VLAN_STP_CTRL,
        .l2_bucket_size = 4,
        .n_mst = 64,
        .num_lag_ids = 8,

diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h
index d08143543e524020364f0675d5b8154d2255ae2e..528c67a3b601ad32eaa661ecbcdf2ca067873f54 100644 (file)
--- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h
+++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h
@@ -292,8 +292,10 @@
 #define MV_ACT_TRAP2CPU                                2
 #define MV_ACT_COPY2CPU                                3
 
+#define RTL838X_VLAN_STP_CTRL                  (0x3b20)
+#define RTL839X_ST_CTRL                                (0x27e4)
 #define RTL930X_ST_CTRL                                (0x8798)
-#define RTL931x_ST_CTRL                                (0x8000)
+#define RTL931X_ST_CTRL                                (0x8000)
 
 #define RTL930X_L2_PORT_SABLK_CTRL             (0x905c)
 #define RTL930X_L2_PORT_DABLK_CTRL             (0x9060)
@@ -1422,6 +1424,7 @@ struct rtldsa_config {
        u32 fib_entries;
        int trk_ctrl;
        int trk_hash_ctrl;
+       int spanning_tree_ctrl;
        void (*vlan_tables_read)(u32 vlan, struct rtl838x_vlan_info *info);
        void (*vlan_set_tagged)(u32 vlan, struct rtl838x_vlan_info *info);
        void (*vlan_set_untagged)(u32 vlan, u64 portmask);

diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c
index 76aa739f662c99719343f4d5e3c0190a6809e110..99d3a56ab33af91e330b59ecb67a51097b928eac 100644 (file)
--- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c
+++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c
@@ -1724,6 +1724,7 @@ int rtldsa_83xx_lag_setup_algomask(struct rtl838x_switch_priv *priv, int group,
 const struct rtldsa_config rtldsa_839x_cfg = {
        .switch_ops = &rtldsa_83xx_switch_ops,
        .phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops,
+       .spanning_tree_ctrl = RTL839X_ST_CTRL,
        .l2_bucket_size = 4,
        .n_mst = 256,
        .num_lag_ids = 16,

diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c
index 4cfc8192a5c077f09d2ac86150af8f10e900816a..5dda31f329c7d1b5242d3822c88b9d592bb77919 100644 (file)
--- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c
+++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c
@@ -2795,6 +2795,7 @@ static void rtldsa_930x_qos_init(struct rtl838x_switch_priv *priv)
 const struct rtldsa_config rtldsa_930x_cfg = {
        .switch_ops = &rtldsa_93xx_switch_ops,
        .phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops,
+       .spanning_tree_ctrl = RTL930X_ST_CTRL,
        .l2_bucket_size = 8,
        .n_mst = 64,
        .num_lag_ids = 16,

diff --git a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c
index a0ece78eb75b33cfbb2c0118430cdb6c21317d86..95e92fa1e4efcd32674c387d280fc5468910330e 100644 (file)
--- a/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c
+++ b/target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c
@@ -1936,6 +1936,7 @@ static void rtldsa_931x_qos_init(struct rtl838x_switch_priv *priv)
 const struct rtldsa_config rtldsa_931x_cfg = {
        .switch_ops = &rtldsa_93xx_switch_ops,
        .phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops,
+       .spanning_tree_ctrl = RTL931X_ST_CTRL,
        .l2_bucket_size = 8,
        .n_mst = 128,
        .num_lag_ids = 16,