]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
ia64: convert widen_[us]sum into convert optab [PR122069]
authorTamar Christina <tamar.christina@arm.com>
Sat, 18 Oct 2025 07:21:09 +0000 (08:21 +0100)
committerTamar Christina <tamar.christina@arm.com>
Sat, 18 Oct 2025 07:24:17 +0000 (08:24 +0100)
The target does not seem to have a maintainer listed, I've CC'ed a group of
global maintainers instead hoping one of you could approve it.

This patch is a mechanical rewrite of the widen_[us]sum optabs from a direct to
a conversion optab.  The result of which requires the output mode to be added to
the existing patterns.

No change in functionality is expected.

gcc/ChangeLog:

PR middle-end/122069
* config/ia64/vect.md (widen_usumv8qi3): Renamed ...
(widen_usumv4hiv8qi3): ... into this.
(widen_usumv4hi3): Renamed ...
(widen_usumv2siv4hi3): ... into this.
(widen_ssumv8qi3): Renamed ...
(widen_ssumv4hiv8qi3): ... into this.
(widen_ssumv4hi3): Renamed ...
(widen_ssumv2siv4hi3): ... into this.

gcc/config/ia64/vect.md

index f17c51496bc54e387487f147e81b9d1d3ebffe34..9d9df1d5e8288a859ccc7a9dec4fc97fb417afcf 100644 (file)
   operands[1] = gen_lowpart (DImode, operands[1]);
 })
 
-(define_expand "widen_usumv8qi3"
+(define_expand "widen_usumv4hiv8qi3"
   [(match_operand:V4HI 0 "gr_register_operand" "")
    (match_operand:V8QI 1 "gr_register_operand" "")
    (match_operand:V4HI 2 "gr_register_operand" "")]
   DONE;
 })
 
-(define_expand "widen_usumv4hi3"
+(define_expand "widen_usumv2siv4hi3"
   [(match_operand:V2SI 0 "gr_register_operand" "")
    (match_operand:V4HI 1 "gr_register_operand" "")
    (match_operand:V2SI 2 "gr_register_operand" "")]
   DONE;
 })
 
-(define_expand "widen_ssumv8qi3"
+(define_expand "widen_ssumv4hiv8qi3"
   [(match_operand:V4HI 0 "gr_register_operand" "")
    (match_operand:V8QI 1 "gr_register_operand" "")
    (match_operand:V4HI 2 "gr_register_operand" "")]
   DONE;
 })
 
-(define_expand "widen_ssumv4hi3"
+(define_expand "widen_ssumv2siv4hi3"
   [(match_operand:V2SI 0 "gr_register_operand" "")
    (match_operand:V4HI 1 "gr_register_operand" "")
    (match_operand:V2SI 2 "gr_register_operand" "")]