}
}
-static int qcom_icc_rpm_set(struct qcom_icc_node *qn, u64 *bw)
+static int qcom_icc_rpm_set(struct qcom_icc_node *qn, u64 *bw, bool ignore_enxio)
{
int ret, rpm_ctx = 0;
u64 bw_bps;
bw_bps);
if (ret) {
pr_err("qcom_icc_rpm_smd_send mas %d error %d\n",
- qn->mas_rpm_id, ret);
- return ret;
+ qn->mas_rpm_id, ret);
+ if (ret != -ENXIO || !ignore_enxio)
+ return ret;
}
}
bw_bps);
if (ret) {
pr_err("qcom_icc_rpm_smd_send slv %d error %d\n",
- qn->slv_rpm_id, ret);
- return ret;
+ qn->slv_rpm_id, ret);
+ if (ret != -ENXIO || !ignore_enxio)
+ return ret;
}
}
}
active_rate = agg_clk_rate[QCOM_SMD_RPM_ACTIVE_STATE];
sleep_rate = agg_clk_rate[QCOM_SMD_RPM_SLEEP_STATE];
- ret = qcom_icc_rpm_set(src_qn, src_qn->sum_avg);
+ ret = qcom_icc_rpm_set(src_qn, src_qn->sum_avg, qp->ignore_enxio);
if (ret)
return ret;
if (dst_qn) {
- ret = qcom_icc_rpm_set(dst_qn, dst_qn->sum_avg);
+ ret = qcom_icc_rpm_set(dst_qn, dst_qn->sum_avg, qp->ignore_enxio);
if (ret)
return ret;
}
for (i = 0; i < cd_num; i++)
qp->intf_clks[i].id = cds[i];
+ qp->ignore_enxio = desc->ignore_enxio;
qp->keep_alive = desc->keep_alive;
qp->type = desc->type;
qp->qos_offset = desc->qos_offset;
* @bus_clk: a pointer to a HLOS-owned bus clock
* @intf_clks: a clk_bulk_data array of interface clocks
* @keep_alive: whether to always keep a minimum vote on the bus clocks
+ * @ignore_enxio: whether to ignore ENXIO errors (for MSM8974)
*/
struct qcom_icc_provider {
struct icc_provider provider;
struct clk *bus_clk;
struct clk_bulk_data *intf_clks;
bool keep_alive;
+ bool ignore_enxio;
};
/**
u16 ab_coeff;
u16 ib_coeff;
int (*get_bw)(struct icc_node *node, u32 *avg, u32 *peak);
+ bool ignore_enxio;
};
/* Valid for all bus types */