ARM: dts: lpc: add #address-cells and #size-cells for sram node

Add #address-cells and #size-cells for sram node to fix below DTB_CHECK
warnings:
  arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dtb: sram@2,0 (mmio-sram): '#address-cells' is a required property

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>

diff --git a/arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts b/arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts
index 8fc89fb6eef1e839ad256ae33942e607fed862c6..9d36283efe0f6ea26efedae9f7246c04f00cbdb7 100644 (file)
--- a/arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts
+++ b/arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts
@@ -406,6 +406,9 @@
                ext_sram: sram@2,0 {
                        compatible = "mmio-sram";
                        reg = <2 0 0x80000>; /* 512 KiB SRAM on IS62WV25616 */
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 2 0 0x80000>;
                };
        };
 };

diff --git a/arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi
index c4422f5870556bd19272b976845cc2b7b5729911..707d22a219d8312381419dba952912b99e2400b2 100644 (file)
--- a/arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi
+++ b/arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi
@@ -24,16 +24,25 @@
                sram0: sram@10000000 {
                        compatible = "mmio-sram";
                        reg = <0x10000000 0x20000>; /* 96 + 32 KiB local SRAM */
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
                };
 
                sram1: sram@10080000 {
                        compatible = "mmio-sram";
                        reg = <0x10080000 0x12000>; /* 64 + 8 KiB local SRAM */
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
                };
 
                sram2: sram@20000000 {
                        compatible = "mmio-sram";
                        reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
                };
        };
 };

diff --git a/arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi
index 72f12db8d53a7d5e8e297762e89e2c11967c26ab..d138ee7869ff3ad3255ebc454d9b7fbbbf3f495a 100644 (file)
--- a/arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi
+++ b/arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi
@@ -24,16 +24,25 @@
                sram0: sram@10000000 {
                        compatible = "mmio-sram";
                        reg = <0x10000000 0x8000>; /* 32 KiB local SRAM */
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
                };
 
                sram1: sram@10080000 {
                        compatible = "mmio-sram";
                        reg = <0x10080000 0xa000>; /* 32 + 8 KiB local SRAM */
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
                };
 
                sram2: sram@20000000 {
                        compatible = "mmio-sram";
                        reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
                };
        };
 };