spi: zynq_qspi: Remove older way of determining qspi modes

Remove older way determining qspi flash connection modes as its
now avaiable in dt and hence moved to getting the same info from
device tree.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c
index 7372c28bb529dd7888ca2bc62756dae0f2b929c0..6e8c12a268c69e328c03b033f175aef5b837d14b 100644 (file)
--- a/arch/arm/mach-zynq/slcr.c
+++ b/arch/arm/mach-zynq/slcr.c
@@ -41,30 +41,6 @@ struct zynq_slcr_mio_get_status {
        u32 check_val;
 };
 
-static const int qspi0_pins[] = {
-       1, 2, 3, 4, 5, 6
-};
-
-static const int qspi1_cs_pin[] = {
-       0
-};
-
-static const int qspi1_pins[] = {
-       9, 10, 11, 12, 13
-};
-
-static const int qspi0_dio_pins[] = {
-       1, 2, 3, 6
-};
-
-static const int qspi1_cs_dio_pin[] = {
-       0
-};
-
-static const int qspi1_dio_pins[] = {
-       9, 10, 11
-};
-
 static const int nand8_pins[] = {
        0, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13
 };
@@ -82,48 +58,6 @@ static const int usb1_pins[] = {
 };
 
 static const struct zynq_slcr_mio_get_status mio_periphs[] = {
-       {
-               "qspi0",
-               qspi0_pins,
-               ARRAY_SIZE(qspi0_pins),
-               SLCR_QSPI_ENABLE_MASK,
-               SLCR_QSPI_ENABLE,
-       },
-       {
-               "qspi1_cs",
-               qspi1_cs_pin,
-               ARRAY_SIZE(qspi1_cs_pin),
-               SLCR_QSPI_ENABLE_MASK,
-               SLCR_QSPI_ENABLE,
-       },
-       {
-               "qspi1",
-               qspi1_pins,
-               ARRAY_SIZE(qspi1_pins),
-               SLCR_QSPI_ENABLE_MASK,
-               SLCR_QSPI_ENABLE,
-       },
-       {
-               "qspi0_dio",
-               qspi0_dio_pins,
-               ARRAY_SIZE(qspi0_dio_pins),
-               SLCR_QSPI_ENABLE_MASK,
-               SLCR_QSPI_ENABLE,
-       },
-       {
-               "qspi1_cs_dio",
-               qspi1_cs_dio_pin,
-               ARRAY_SIZE(qspi1_cs_dio_pin),
-               SLCR_QSPI_ENABLE_MASK,
-               SLCR_QSPI_ENABLE,
-       },
-       {
-               "qspi1_dio",
-               qspi1_dio_pins,
-               ARRAY_SIZE(qspi1_dio_pins),
-               SLCR_QSPI_ENABLE_MASK,
-               SLCR_QSPI_ENABLE,
-       },
        {
                "nand8",
                nand8_pins,

diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
index 8155effb5f3ce935a187a8c80351fae517afaa71..a68afc84e682faf0b64d9734068cbfeb1414e777 100644 (file)
--- a/drivers/spi/zynq_qspi.c
+++ b/drivers/spi/zynq_qspi.c
@@ -294,64 +294,6 @@ static void zynq_qspi_init_hw(struct zynq_qspi_priv *priv)
        writel(ZYNQ_QSPI_ENABLE_ENABLE_MASK, &regs->enbr);
 }
 
-/*
- * zynq_qspi_check_is_dual_flash - checking for dual or single qspi
- *
- * This function will check the type of the flash whether it supports
- * single or dual qspi based on the MIO configuration done by FSBL.
- *
- * User needs to correctly configure the MIO's based on the
- * number of qspi flashes present on the board.
- *
- * function will return -1, if there is no MIO configuration for
- * qspi flash.
- */
-static void zynq_qspi_check_is_dual_flash(struct zynq_qspi_priv *priv)
-{
-       int lower_mio = 0, upper_mio = 0, upper_mio_cs1 = 0;
-
-       priv->is_dual = -1;
-       priv->is_dio = 0;
-       lower_mio = zynq_slcr_get_mio_pin_status("qspi0");
-       if (lower_mio == ZYNQ_QSPI_MIO_NUM_QSPI0) {
-               priv->is_dual = SF_SINGLE_FLASH;
-       } else {
-               lower_mio = zynq_slcr_get_mio_pin_status("qspi0_dio");
-               if (lower_mio == ZYNQ_QSPI_MIO_NUM_QSPI0_DIO) {
-                       debug("QSPI in Single 2-bit\n");
-                       priv->is_dio = SF_DUALIO_FLASH;
-                       priv->is_dual = SF_SINGLE_FLASH;
-               }
-       }
-
-       if (priv->is_dio != SF_DUALIO_FLASH) {
-               upper_mio_cs1 = zynq_slcr_get_mio_pin_status("qspi1_cs");
-               if ((lower_mio == ZYNQ_QSPI_MIO_NUM_QSPI0) &&
-                   (upper_mio_cs1 == ZYNQ_QSPI_MIO_NUM_QSPI1_CS))
-                       priv->is_dual = SF_DUAL_STACKED_FLASH;
-
-               upper_mio = zynq_slcr_get_mio_pin_status("qspi1");
-               if ((lower_mio == ZYNQ_QSPI_MIO_NUM_QSPI0) &&
-                   (upper_mio_cs1 == ZYNQ_QSPI_MIO_NUM_QSPI1_CS) &&
-                   (upper_mio == ZYNQ_QSPI_MIO_NUM_QSPI1))
-                       priv->is_dual = SF_DUAL_PARALLEL_FLASH;
-       } else {
-               upper_mio_cs1 = zynq_slcr_get_mio_pin_status("qspi1_cs_dio");
-               if ((lower_mio == ZYNQ_QSPI_MIO_NUM_QSPI0_DIO) &&
-                   (upper_mio_cs1 == ZYNQ_QSPI_MIO_NUM_QSPI1_CS_DIO)) {
-                       debug("QSPI in DualStacked 2-bit\n");
-                       priv->is_dual = SF_DUAL_STACKED_FLASH;
-               }
-               upper_mio = zynq_slcr_get_mio_pin_status("qspi1_dio");
-               if ((lower_mio == ZYNQ_QSPI_MIO_NUM_QSPI0_DIO) &&
-                   (upper_mio_cs1 == ZYNQ_QSPI_MIO_NUM_QSPI1_CS_DIO) &&
-                   (upper_mio == ZYNQ_QSPI_MIO_NUM_QSPI1_DIO)) {
-                       debug("QSPI in DualParallel 2-bit\n");
-                       priv->is_dual = SF_DUAL_PARALLEL_FLASH;
-               }
-       }
-}
-
 static int zynq_qspi_child_pre_probe(struct udevice *bus)
 {
        struct spi_slave *slave = dev_get_parent_priv(bus);
@@ -373,7 +315,6 @@ static int zynq_qspi_probe(struct udevice *bus)
        debug("zynq_qspi_probe:  bus:%p, priv:%p \n", bus, priv);
 
        priv->regs = plat->regs;
-       zynq_qspi_check_is_dual_flash(priv);
        priv->is_dual = plat->is_dual;
 
        if (priv->is_dual == -1) {