sysbus_mmio_get_region(sbd, 0));
}
+static inline void crl_connect_dev(Object *crl, Object *dev)
+{
+ const char *prop = object_get_canonical_path_component(dev);
+
+ /* The component part of the device path matches the CRL property name */
+ object_property_set_link(crl, prop, dev, &error_abort);
+}
+
+static inline void crl_connect_dev_by_name(Versal *s, Object *crl,
+ const char *name, size_t num)
+{
+ size_t i;
+
+ for (i = 0; i < num; i++) {
+ Object *dev = versal_get_child_idx(s, name, i);
+
+ crl_connect_dev(crl, dev);
+ }
+}
+
static inline void versal_create_crl(Versal *s)
{
const VersalMap *map;
const char *crl_class;
DeviceState *dev;
+ Object *obj;
map = versal_get_map(s);
crl_class = TYPE_XLNX_VERSAL_CRL;
dev = qdev_new(crl_class);
- object_property_add_child(OBJECT(s), "crl", OBJECT(dev));
+ obj = OBJECT(dev);
+ object_property_add_child(OBJECT(s), "crl", obj);
+
+ crl_connect_dev_by_name(s, obj, "rpu-cluster/rpu",
+ map->rpu.num_cluster * map->rpu.num_core);
+ crl_connect_dev_by_name(s, obj, map->zdma[0].name, map->zdma[0].num_chan);
+ crl_connect_dev_by_name(s, obj, "uart", map->num_uart);
+ crl_connect_dev_by_name(s, obj, "gem", map->num_gem);
+ crl_connect_dev_by_name(s, obj, "usb", map->num_usb);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_abort);