perf/x86/intel: Add a distinct name for Granite Rapids

[ Upstream commit fa0c1c9d283b37fdb7fc1dcccbb88fc8f48a4aa4 ]

Currently, the Sapphire Rapids and Granite Rapids share the same PMU
name, sapphire_rapids. Because from the kernel’s perspective, GNR is
similar to SPR. The only key difference is that they support different
extra MSRs. The code path and the PMU name are shared.

However, from end users' perspective, they are quite different. Besides
the extra MSRs, GNR has a newer PEBS format, supports Retire Latency,
supports new CPUID enumeration architecture, doesn't required the
load-latency AUX event, has additional TMA Level 1 Architectural Events,
etc. The differences can be enumerated by CPUID or the PERF_CAPABILITIES
MSR. They weren't reflected in the model-specific kernel setup.
But it is worth to have a distinct PMU name for GNR.

Fixes: a6742cb90b56 ("perf/x86/intel: Fix the FRONTEND encoding on GNR and MTL")
Suggested-by: Ahmad Yasin <ahmad.yasin@intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20240708193336.1192217-3-kan.liang@linux.intel.com
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 7f7f1c3bb18815688e09b0e001dd390ca24f7497..101a21fe9c21305f410b4b63b6de9b0a1349b5ec 100644 (file)
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -6756,12 +6756,18 @@ __init int intel_pmu_init(void)
        case INTEL_EMERALDRAPIDS_X:
                x86_pmu.flags |= PMU_FL_MEM_LOADS_AUX;
                x86_pmu.extra_regs = intel_glc_extra_regs;
-               fallthrough;
+               pr_cont("Sapphire Rapids events, ");
+               name = "sapphire_rapids";
+               goto glc_common;
+
        case INTEL_GRANITERAPIDS_X:
        case INTEL_GRANITERAPIDS_D:
+               x86_pmu.extra_regs = intel_rwc_extra_regs;
+               pr_cont("Granite Rapids events, ");
+               name = "granite_rapids";
+
+       glc_common:
                intel_pmu_init_glc(NULL);
-               if (!x86_pmu.extra_regs)
-                       x86_pmu.extra_regs = intel_rwc_extra_regs;
                x86_pmu.pebs_ept = 1;
                x86_pmu.hw_config = hsw_hw_config;
                x86_pmu.get_event_constraints = glc_get_event_constraints;
@@ -6772,8 +6778,6 @@ __init int intel_pmu_init(void)
                td_attr = glc_td_events_attrs;
                tsx_attr = glc_tsx_events_attrs;
                intel_pmu_pebs_data_source_skl(true);
-               pr_cont("Sapphire Rapids events, ");
-               name = "sapphire_rapids";
                break;
 
        case INTEL_ALDERLAKE: