drm/xe: Add missing ADL-P engine workaround

Add the one missing workaround for ADL-P when comparing to i915 up to
commit 7cdae9e9ee5e ("drm/i915: Move DG2 tuning to the right function").

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20230314003012.2600353-13-lucas.demarchi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 0621706f46e6242a4863d7902bd408b602cdb949..e21c7ec53b2fdb35422f884630e76dceb5a654ea 100644 (file)
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -299,6 +299,16 @@ static const struct xe_rtp_entry engine_was[] = {
                             XE_RTP_ACTION_FLAG(MASKED_REG)))
        },
 
+       /* ADL-P */
+
+       { XE_RTP_NAME("1607297627, 1607030317, 1607186500"),
+         XE_RTP_RULES(PLATFORM(ALDERLAKE_P), ENGINE_CLASS(RENDER)),
+         XE_RTP_ACTIONS(SET(RING_PSMI_CTL(RENDER_RING_BASE),
+                            GEN12_WAIT_FOR_EVENT_POWER_DOWN_DISABLE |
+                            GEN8_RC_SEMA_IDLE_MSG_DISABLE,
+                            XE_RTP_ACTION_FLAG(MASKED_REG)))
+       },
+
        /* DG2 */
 
        { XE_RTP_NAME("22013037850"),