+++ /dev/null
-From a3efb7fb7ef93daa2e902171958ef6c9a7df1616 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Tue, 6 Jan 2026 11:11:19 -0500
-Subject: drm/amd/display: Ensure link output is disabled in backend reset for
- PLL_ON
-
-From: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
-
-[ Upstream commit 4589712e0111352973131bad975023b25569287c ]
-
-[Why]
-We're missing the code to actually disable the link output when we have
-to leave the SYMCLK_ON but the TX remains OFF.
-
-[How]
-Port the code from DCN401 that detects SYMCLK_ON_TX_OFF and disable
-the link output when the backend is reset.
-
-Reviewed-by: Ovidiu (Ovi) Bunea <ovidiu.bunea@amd.com>
-Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
-Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com>
-Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- .../drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c | 16 +++++++++++++++-
- 1 file changed, 15 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
-index 9aa925a0b3b43..322515aee728e 100644
---- a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
-+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
-@@ -525,8 +525,22 @@ static void dcn31_reset_back_end_for_pipe(
- if (pipe_ctx->stream_res.tg->funcs->set_odm_bypass)
- pipe_ctx->stream_res.tg->funcs->set_odm_bypass(
- pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing);
-+ /*
-+ * TODO - convert symclk_ref_cnts for otg to a bit map to solve
-+ * the case where the same symclk is shared across multiple otg
-+ * instances
-+ */
- if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal))
-- pipe_ctx->stream->link->phy_state.symclk_ref_cnts.otg = 0;
-+ link->phy_state.symclk_ref_cnts.otg = 0;
-+
-+ if (pipe_ctx->top_pipe == NULL) {
-+ if (link->phy_state.symclk_state == SYMCLK_ON_TX_OFF) {
-+ const struct link_hwss *link_hwss = get_link_hwss(link, &pipe_ctx->link_res);
-+
-+ link_hwss->disable_link_output(link, &pipe_ctx->link_res, pipe_ctx->stream->signal);
-+ link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF;
-+ }
-+ }
-
- set_drr_and_clear_adjust_pending(pipe_ctx, pipe_ctx->stream, NULL);
-
---
-2.51.0
-
asoc-soc-acpi-intel-arl-match-change-rt722-amp-endpo.patch
pci-add-intel-nova-lake-audio-device-id.patch
drm-amd-display-disable-fec-when-powering-down-encod.patch
-drm-amd-display-ensure-link-output-is-disabled-in-ba.patch
drm-atmel-hlcdc-fix-memory-leak-from-the-atomic_dest.patch
drm-atmel-hlcdc-don-t-reject-the-commit-if-the-src-r.patch
drm-atmel-hlcdc-fix-use-after-free-of-drm_crtc_commi.patch
+++ /dev/null
-From dbd867ccbedca73e627cb8733d7d5c5e6c70b216 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Tue, 6 Jan 2026 11:11:19 -0500
-Subject: drm/amd/display: Ensure link output is disabled in backend reset for
- PLL_ON
-
-From: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
-
-[ Upstream commit 4589712e0111352973131bad975023b25569287c ]
-
-[Why]
-We're missing the code to actually disable the link output when we have
-to leave the SYMCLK_ON but the TX remains OFF.
-
-[How]
-Port the code from DCN401 that detects SYMCLK_ON_TX_OFF and disable
-the link output when the backend is reset.
-
-Reviewed-by: Ovidiu (Ovi) Bunea <ovidiu.bunea@amd.com>
-Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
-Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com>
-Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- .../gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c | 16 +++++++++++++++-
- 1 file changed, 15 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c
-index 22da2007601ee..a782ffc5f4cf9 100644
---- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c
-+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c
-@@ -523,8 +523,22 @@ static void dcn31_reset_back_end_for_pipe(
- if (pipe_ctx->stream_res.tg->funcs->set_odm_bypass)
- pipe_ctx->stream_res.tg->funcs->set_odm_bypass(
- pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing);
-+ /*
-+ * TODO - convert symclk_ref_cnts for otg to a bit map to solve
-+ * the case where the same symclk is shared across multiple otg
-+ * instances
-+ */
- if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal))
-- pipe_ctx->stream->link->phy_state.symclk_ref_cnts.otg = 0;
-+ link->phy_state.symclk_ref_cnts.otg = 0;
-+
-+ if (pipe_ctx->top_pipe == NULL) {
-+ if (link->phy_state.symclk_state == SYMCLK_ON_TX_OFF) {
-+ const struct link_hwss *link_hwss = get_link_hwss(link, &pipe_ctx->link_res);
-+
-+ link_hwss->disable_link_output(link, &pipe_ctx->link_res, pipe_ctx->stream->signal);
-+ link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF;
-+ }
-+ }
-
- if (pipe_ctx->stream_res.tg->funcs->set_drr)
- pipe_ctx->stream_res.tg->funcs->set_drr(
---
-2.51.0
-
drm-account-property-blob-allocations-to-memcg.patch
hyper-v-mark-inner-union-in-hv_kvp_exchg_msg_value-a.patch
virt-vbox-uapi-mark-inner-unions-in-packed-structs-a.patch
-drm-amd-display-ensure-link-output-is-disabled-in-ba.patch
drm-atmel-hlcdc-fix-memory-leak-from-the-atomic_dest.patch
drm-atmel-hlcdc-don-t-reject-the-commit-if-the-src-r.patch
drm-atmel-hlcdc-fix-use-after-free-of-drm_crtc_commi.patch