--- /dev/null
+From 642528355c694f5ed68f6bff9ff520326a249f99 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Tue, 27 May 2014 16:40:51 -0400
+Subject: drm/radeon/atom: fix dithering on certain panels
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 642528355c694f5ed68f6bff9ff520326a249f99 upstream.
+
+We need to specify the encoder mode as LVDS for eDP
+when using the Crtc_Source atom table in order to properly
+set up the FMT hardware.
+
+bug:
+https://bugs.freedesktop.org/show_bug.cgi?id=73911
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/atombios_encoders.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/atombios_encoders.c
++++ b/drivers/gpu/drm/radeon/atombios_encoders.c
+@@ -1877,8 +1877,11 @@ atombios_set_encoder_crtc_source(struct
+ args.v2.ucEncodeMode = ATOM_ENCODER_MODE_CRT;
+ else
+ args.v2.ucEncodeMode = atombios_get_encoder_mode(encoder);
+- } else
++ } else if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
++ args.v2.ucEncodeMode = ATOM_ENCODER_MODE_LVDS;
++ } else {
+ args.v2.ucEncodeMode = atombios_get_encoder_mode(encoder);
++ }
+ switch (radeon_encoder->encoder_id) {
+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
--- /dev/null
+From ec65da385d46f63740c1c9230b891a6dcbd64c71 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= <marek.olsak@amd.com>
+Date: Tue, 27 May 2014 02:56:36 +0200
+Subject: drm/radeon: don't allow RADEON_GEM_DOMAIN_CPU for command submission
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Marek Olšák <marek.olsak@amd.com>
+
+commit ec65da385d46f63740c1c9230b891a6dcbd64c71 upstream.
+
+It hangs the hardware.
+
+Signed-off-by: Marek Olšák <marek.olsak@amd.com>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_cs.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/gpu/drm/radeon/radeon_cs.c
++++ b/drivers/gpu/drm/radeon/radeon_cs.c
+@@ -96,6 +96,12 @@ static int radeon_cs_parser_relocs(struc
+ uint32_t domain = r->write_domain ?
+ r->write_domain : r->read_domains;
+
++ if (domain & RADEON_GEM_DOMAIN_CPU) {
++ DRM_ERROR("RADEON_GEM_DOMAIN_CPU is not valid "
++ "for command submission\n");
++ return -EINVAL;
++ }
++
+ p->relocs[i].lobj.domain = domain;
+ if (domain == RADEON_GEM_DOMAIN_VRAM)
+ domain |= RADEON_GEM_DOMAIN_GTT;
--- /dev/null
+From 3b6d9fd23e015b5397c438fd3cd74147d2c805b6 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Tue, 27 May 2014 13:48:05 -0400
+Subject: drm/radeon/dp: fix lane/clock setup for dp 1.2 capable devices
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 3b6d9fd23e015b5397c438fd3cd74147d2c805b6 upstream.
+
+Only DCE5+ asics support DP 1.2.
+
+Noticed by ArtForz on IRC.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/atombios_dp.c | 17 +++++++++++++++--
+ 1 file changed, 15 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/atombios_dp.c
++++ b/drivers/gpu/drm/radeon/atombios_dp.c
+@@ -384,6 +384,19 @@ static int dp_get_max_dp_pix_clock(int l
+
+ /***** radeon specific DP functions *****/
+
++static int radeon_dp_get_max_link_rate(struct drm_connector *connector,
++ u8 dpcd[DP_DPCD_SIZE])
++{
++ int max_link_rate;
++
++ if (radeon_connector_is_dp12_capable(connector))
++ max_link_rate = min(drm_dp_max_link_rate(dpcd), 540000);
++ else
++ max_link_rate = min(drm_dp_max_link_rate(dpcd), 270000);
++
++ return max_link_rate;
++}
++
+ /* First get the min lane# when low rate is used according to pixel clock
+ * (prefer low rate), second check max lane# supported by DP panel,
+ * if the max lane# < low rate lane# then use max lane# instead.
+@@ -393,7 +406,7 @@ static int radeon_dp_get_dp_lane_number(
+ int pix_clock)
+ {
+ int bpp = convert_bpc_to_bpp(radeon_get_monitor_bpc(connector));
+- int max_link_rate = drm_dp_max_link_rate(dpcd);
++ int max_link_rate = radeon_dp_get_max_link_rate(connector, dpcd);
+ int max_lane_num = drm_dp_max_lane_count(dpcd);
+ int lane_num;
+ int max_dp_pix_clock;
+@@ -431,7 +444,7 @@ static int radeon_dp_get_dp_link_clock(s
+ return 540000;
+ }
+
+- return drm_dp_max_link_rate(dpcd);
++ return radeon_dp_get_max_link_rate(connector, dpcd);
+ }
+
+ static u8 radeon_dp_encoder_service(struct radeon_device *rdev,
--- /dev/null
+From af5d36539dfe043f1cf0f8b7334d6bb12cd14e75 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Tue, 27 May 2014 13:11:36 -0400
+Subject: drm/radeon: fix typo in radeon_connector_is_dp12_capable()
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit af5d36539dfe043f1cf0f8b7334d6bb12cd14e75 upstream.
+
+We were checking the ext clock rather than the display clock.
+
+Noticed by ArtForz on IRC.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_connectors.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_connectors.c
++++ b/drivers/gpu/drm/radeon/radeon_connectors.c
+@@ -1345,7 +1345,7 @@ bool radeon_connector_is_dp12_capable(st
+ struct radeon_device *rdev = dev->dev_private;
+
+ if (ASIC_IS_DCE5(rdev) &&
+- (rdev->clock.dp_extclk >= 53900) &&
++ (rdev->clock.default_dispclk >= 53900) &&
+ radeon_connector_encoder_is_hbr2(connector)) {
+ return true;
+ }
mtd-elbc-nand-fix-subpage-write-support.patch
mtd-nand-omap-fix-bchx-ecc.correct-to-return-detected-bit-flips-in-erased-page.patch
drm-radeon-only-apply-hdmi-bpc-pll-flags-when-encoder-mode-is-hdmi.patch
+drm-radeon-fix-typo-in-radeon_connector_is_dp12_capable.patch
+drm-radeon-dp-fix-lane-clock-setup-for-dp-1.2-capable-devices.patch
+drm-radeon-atom-fix-dithering-on-certain-panels.patch
+drm-radeon-don-t-allow-radeon_gem_domain_cpu-for-command-submission.patch