]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
arm.c (arm_legitimize_address): Check xop1 is not a constant immediate before force_reg.
authorYufeng Zhang <yufeng.zhang@arm.com>
Tue, 26 Nov 2013 16:36:14 +0000 (16:36 +0000)
committerYufeng Zhang <yufeng@gcc.gnu.org>
Tue, 26 Nov 2013 16:36:14 +0000 (16:36 +0000)
gcc/

* config/arm/arm.c (arm_legitimize_address): Check xop1 is not
a constant immediate before force_reg.

gcc/testsuite/

* gcc.target/arm/20131120.c: New test.

From-SVN: r205397

gcc/ChangeLog
gcc/config/arm/arm.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/arm/20131120.c [new file with mode: 0644]

index 75ad19c9e34aa312685fe310d91f3f45743c3534..62dc6e0bca56c8c4906e2b5150d66a7e7ceba9c7 100644 (file)
@@ -1,3 +1,8 @@
+2013-11-26  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * config/arm/arm.c (arm_legitimize_address): Check xop1 is not
+       a constant immediate before force_reg.
+
 2013-11-26  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/59245
index f88ebbc1536321682d53de90459d4856ac241196..129e4280ae2c33bba312e9352fcaf4ffeec83ba7 100644 (file)
@@ -7118,7 +7118,8 @@ arm_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode)
       if (CONSTANT_P (xop0) && !symbol_mentioned_p (xop0))
        xop0 = force_reg (SImode, xop0);
 
-      if (CONSTANT_P (xop1) && !symbol_mentioned_p (xop1))
+      if (CONSTANT_P (xop1) && !CONST_INT_P (xop1)
+         && !symbol_mentioned_p (xop1))
        xop1 = force_reg (SImode, xop1);
 
       if (ARM_BASE_REGISTER_RTX_P (xop0)
index 23113f3009de0e28557e1734f2d6ae2967553eb8..9cbfd4184c72e4be4cae99ff321bf4c7bc459dc1 100644 (file)
@@ -1,3 +1,7 @@
+2013-11-26  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * gcc.target/arm/20131120.c: New test.
+
 2013-11-26  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/59245
diff --git a/gcc/testsuite/gcc.target/arm/20131120.c b/gcc/testsuite/gcc.target/arm/20131120.c
new file mode 100644 (file)
index 0000000..c370ae6
--- /dev/null
@@ -0,0 +1,14 @@
+/* Check that CONST_INT is not forced into REG before PLUS.  */
+/* { dg-do compile { target { arm_arm_ok || arm_thumb2_ok} } } */
+/* { dg-options "-O2 -fdump-rtl-expand" } */
+
+typedef int Arr2[50][50];
+
+void
+foo (Arr2 a2, int i)
+{
+  a2[i+20][i] = 1;
+}
+
+/* { dg-final { scan-rtl-dump-not "\\\(set \\\(reg:SI \[0-9\]*\\\)\[\n\r\]+\[ \t]*\\\(const_int 4000" "expand" } } */
+/* { dg-final { cleanup-rtl-dump "expand" } } */