]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
zynqmp: Provide a Kconfig option to use specified memory for MMU table
authorSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Thu, 13 Jul 2017 13:31:11 +0000 (19:01 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 13 Jul 2017 13:44:02 +0000 (15:44 +0200)
This patch provides a Kconfig option to use specified
memory for MMU table using reserve_mmu platform specific
routine. Here we used TCM space for MMU table.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/cpu/armv8/zynqmp/Kconfig
arch/arm/cpu/armv8/zynqmp/cpu.c
arch/arm/include/asm/arch-zynqmp/hardware.h

index b1a1c7ee2b09408f357c4ab18bfa0e81c9d7ff46..b1f2a8ecc5e1a5453ec6a6ccc1dbfc34a7bb429a 100644 (file)
@@ -42,6 +42,13 @@ config SYS_CONFIG_NAME
          Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
          will be used for board configuration.
 
+config SYS_MEM_RSVD_FOR_MMU
+       bool "Reserve memory for MMU Table"
+       help
+         If defined this option is used to setup different space for
+         MMU table than the one which will be allocated during
+         relocation.
+
 config BOOT_INIT_FILE
        string "boot.bin init register filename"
        depends on SPL
index 5fba0716ca0df2ece9d61b08d2d8e2237a3d830e..c44c93f936ac46f2b9942433c2e15debe7cce30d 100644 (file)
@@ -77,6 +77,18 @@ u64 get_page_table_size(void)
        return 0x14000;
 }
 
+#ifdef CONFIG_SYS_MEM_RSVD_FOR_MMU
+int reserve_mmu(void)
+{
+       initialize_tcm(TCM_LOCK);
+       memset((void *)ZYNQMP_TCM_BASE_ADDR, 0, ZYNQMP_TCM_SIZE);
+       gd->arch.tlb_size = PGTABLE_SIZE;
+       gd->arch.tlb_addr = ZYNQMP_TCM_BASE_ADDR;
+
+       return 0;
+}
+#endif
+
 static unsigned int zynqmp_get_silicon_version_secure(void)
 {
        u32 ver;
index 1530a38df1818cdb6b278c7ca847aa2a85228586..04c1a5fefa30e06ee4ab50282f50d8cdd8b3d3b0 100644 (file)
@@ -18,6 +18,9 @@
 
 #define ARASAN_NAND_BASEADDR   0xFF100000
 
+#define ZYNQMP_TCM_BASE_ADDR   0xFFE00000
+#define ZYNQMP_TCM_SIZE                0x40000
+
 #define ZYNQMP_CRL_APB_BASEADDR        0xFF5E0000
 #define ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT       0x1000000
 #define ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT      0