clk: sophgo: sg2042-clkgen: convert from round_rate() to determine_rate()

The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Tested-by: Chen Wang <unicorn_wang@outlook.com> # Pioneerbox
Signed-off-by: Brian Masney <bmasney@redhat.com>

diff --git a/drivers/clk/sophgo/clk-sg2042-clkgen.c b/drivers/clk/sophgo/clk-sg2042-clkgen.c
index 9e61288d34f3757315702c355f2669577b29676f..683661b71787c9e5428b168502f6fbb30ea9f7da 100644 (file)
--- a/drivers/clk/sophgo/clk-sg2042-clkgen.c
+++ b/drivers/clk/sophgo/clk-sg2042-clkgen.c
@@ -176,9 +176,8 @@ static unsigned long sg2042_clk_divider_recalc_rate(struct clk_hw *hw,
        return ret_rate;
 }
 
-static long sg2042_clk_divider_round_rate(struct clk_hw *hw,
-                                         unsigned long rate,
-                                         unsigned long *prate)
+static int sg2042_clk_divider_determine_rate(struct clk_hw *hw,
+                                            struct clk_rate_request *req)
 {
        struct sg2042_divider_clock *divider = to_sg2042_clk_divider(hw);
        unsigned long ret_rate;
@@ -192,15 +191,17 @@ static long sg2042_clk_divider_round_rate(struct clk_hw *hw,
                        bestdiv = readl(divider->reg) >> divider->shift;
                        bestdiv &= clk_div_mask(divider->width);
                }
-               ret_rate = DIV_ROUND_UP_ULL((u64)*prate, bestdiv);
+               ret_rate = DIV_ROUND_UP_ULL((u64)req->best_parent_rate, bestdiv);
        } else {
-               ret_rate = divider_round_rate(hw, rate, prate, NULL,
+               ret_rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, NULL,
                                              divider->width, divider->div_flags);
        }
 
        pr_debug("--> %s: divider_round_rate: val = %ld\n",
                 clk_hw_get_name(hw), ret_rate);
-       return ret_rate;
+       req->rate = ret_rate;
+
+       return 0;
 }
 
 static int sg2042_clk_divider_set_rate(struct clk_hw *hw,
@@ -258,13 +259,13 @@ static int sg2042_clk_divider_set_rate(struct clk_hw *hw,
 
 static const struct clk_ops sg2042_clk_divider_ops = {
        .recalc_rate = sg2042_clk_divider_recalc_rate,
-       .round_rate = sg2042_clk_divider_round_rate,
+       .determine_rate = sg2042_clk_divider_determine_rate,
        .set_rate = sg2042_clk_divider_set_rate,
 };
 
 static const struct clk_ops sg2042_clk_divider_ro_ops = {
        .recalc_rate = sg2042_clk_divider_recalc_rate,
-       .round_rate = sg2042_clk_divider_round_rate,
+       .determine_rate = sg2042_clk_divider_determine_rate,
 };
 
 /*