ARM: dts: stm32: Add new pinmux groups for phyboard-sargas and phycore

Add add alternate pinmux for following interfaces used on
phyBOARD-Sargas:
- UART4
- LTDC
- DCMI
- TIM5
- SAI2

Fix "ethernet0_rgmii_pins_d" pinmux used on phyCORE-STM32MP15x:
ETH_RGMII_GTX_CLK pin was missing.

Signed-off-by: Christophe Parant <c.parant@phytec.fr>
Link: https://lore.kernel.org/r/20251210101611.27008-5-c.parant@phytec.fr
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
index 8613a6a17ee985c376a3991df21088ace1582c43..aaa91b634c12ff8ef1c6ec88527b932e078022a3 100644 (file)
--- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
@@ -231,6 +231,45 @@
                };
        };
 
+       /omit-if-no-ref/
+       dcmi_pins_d: dcmi-3 {
+               pins {
+                       pinmux = <STM32_PINMUX('H', 8,  AF13)>,/* DCMI_HSYNC */
+                                <STM32_PINMUX('B', 7,  AF13)>,/* DCMI_VSYNC */
+                                <STM32_PINMUX('A', 6,  AF13)>,/* DCMI_PIXCLK */
+                                <STM32_PINMUX('H', 9,  AF13)>,/* DCMI_D0 */
+                                <STM32_PINMUX('C', 7,  AF13)>,/* DCMI_D1 */
+                                <STM32_PINMUX('E', 0,  AF13)>,/* DCMI_D2 */
+                                <STM32_PINMUX('E', 1,  AF13)>,/* DCMI_D3 */
+                                <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
+                                <STM32_PINMUX('I', 4,  AF13)>,/* DCMI_D5 */
+                                <STM32_PINMUX('E', 5,  AF13)>,/* DCMI_D6 */
+                                <STM32_PINMUX('I', 7,  AF13)>,/* DCMI_D7 */
+                                <STM32_PINMUX('I', 1,  AF13)>,/* DCMI_D8 */
+                                <STM32_PINMUX('H', 7,  AF13)>;/* DCMI_D9 */
+                       bias-disable;
+               };
+       };
+
+       /omit-if-no-ref/
+       dcmi_sleep_pins_d: dcmi-sleep-3 {
+               pins {
+                       pinmux = <STM32_PINMUX('H', 8,  ANALOG)>,/* DCMI_HSYNC */
+                                <STM32_PINMUX('B', 7,  ANALOG)>,/* DCMI_VSYNC */
+                                <STM32_PINMUX('A', 6,  ANALOG)>,/* DCMI_PIXCLK */
+                                <STM32_PINMUX('H', 9,  ANALOG)>,/* DCMI_D0 */
+                                <STM32_PINMUX('C', 7,  ANALOG)>,/* DCMI_D1 */
+                                <STM32_PINMUX('E', 0,  ANALOG)>,/* DCMI_D2 */
+                                <STM32_PINMUX('E', 1,  ANALOG)>,/* DCMI_D3 */
+                                <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
+                                <STM32_PINMUX('I', 4,  ANALOG)>,/* DCMI_D5 */
+                                <STM32_PINMUX('E', 5,  ANALOG)>,/* DCMI_D6 */
+                                <STM32_PINMUX('I', 7,  ANALOG)>,/* DCMI_D7 */
+                                <STM32_PINMUX('I', 1,  ANALOG)>,/* DCMI_D8 */
+                                <STM32_PINMUX('H', 7,  ANALOG)>;/* DCMI_D9 */
+               };
+       };
+
        /omit-if-no-ref/
        ethernet0_rgmii_pins_a: rgmii-0 {
                pins1 {
@@ -394,6 +433,7 @@
        ethernet0_rgmii_pins_d: rgmii-3 {
                pins1 {
                        pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
+                                <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
                                 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
                                 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
                                 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
@@ -1343,6 +1383,65 @@
                };
        };
 
+       /omit-if-no-ref/
+       ltdc_pins_f: ltdc-5 {
+               pins {
+                       pinmux = <STM32_PINMUX('G', 7,  AF14)>, /* LCD_CLK */
+                                <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
+                                <STM32_PINMUX('I', 9,  AF14)>, /* LCD_VSYNC */
+                                <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */
+                                <STM32_PINMUX('C', 10, AF14)>, /* LCD_R2 */
+                                <STM32_PINMUX('B', 0,   AF9)>, /* LCD_R3 */
+                                <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
+                                <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */
+                                <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
+                                <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
+                                <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
+                                <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */
+                                <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
+                                <STM32_PINMUX('H', 4,   AF9)>, /* LCD_G5 */
+                                <STM32_PINMUX('I', 11,  AF9)>, /* LCD_G6 */
+                                <STM32_PINMUX('I', 2,  AF14)>, /* LCD_G7 */
+                                <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
+                                <STM32_PINMUX('G', 11, AF14)>, /* LCD_B3 */
+                                <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */
+                                <STM32_PINMUX('I', 5,  AF14)>, /* LCD_B5 */
+                                <STM32_PINMUX('B', 8,  AF14)>, /* LCD_B6 */
+                                <STM32_PINMUX('D', 8,  AF14)>; /* LCD_B7 */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <1>;
+               };
+       };
+
+       /omit-if-no-ref/
+       ltdc_sleep_pins_f: ltdc-sleep-5 {
+               pins {
+                       pinmux = <STM32_PINMUX('G', 7,  ANALOG)>, /* LCD_CLK */
+                                <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
+                                <STM32_PINMUX('I', 9,  ANALOG)>, /* LCD_VSYNC */
+                                <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */
+                                <STM32_PINMUX('C', 10, ANALOG)>, /* LCD_R2 */
+                                <STM32_PINMUX('B', 0,  ANALOG)>, /* LCD_R3 */
+                                <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
+                                <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */
+                                <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
+                                <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
+                                <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
+                                <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */
+                                <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
+                                <STM32_PINMUX('H', 4,  ANALOG)>, /* LCD_G5 */
+                                <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
+                                <STM32_PINMUX('I', 2,  ANALOG)>, /* LCD_G7 */
+                                <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
+                                <STM32_PINMUX('G', 11, ANALOG)>, /* LCD_B3 */
+                                <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */
+                                <STM32_PINMUX('I', 5,  ANALOG)>, /* LCD_B5 */
+                                <STM32_PINMUX('B', 8,  ANALOG)>, /* LCD_B6 */
+                                <STM32_PINMUX('D', 8,  ANALOG)>; /* LCD_B7 */
+               };
+       };
+
        /omit-if-no-ref/
        mco1_pins_a: mco1-0 {
                pins {
@@ -1683,6 +1782,23 @@
                };
        };
 
+       /omit-if-no-ref/
+       pwm5_pins_c: pwm5-2 {
+               pins {
+                       pinmux = <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */
+                       bias-pull-down;
+                       drive-push-pull;
+                       slew-rate = <0>;
+               };
+       };
+
+       /omit-if-no-ref/
+       pwm5_sleep_pins_c: pwm5-sleep-2 {
+               pins {
+                       pinmux = <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */
+               };
+       };
+
        /omit-if-no-ref/
        pwm8_pins_a: pwm8-0 {
                pins {
@@ -1908,6 +2024,21 @@
                };
        };
 
+       /omit-if-no-ref/
+       sai2a_pins_d: sai2a-3 {
+               pins {
+                       pinmux = <STM32_PINMUX('I', 6, AF10)>; /* SAI2_SD_A */
+                       bias-disable;
+               };
+       };
+
+       /omit-if-no-ref/
+       sai2a_sleep_pins_d: sai2a-3 {
+               pins {
+                       pinmux = <STM32_PINMUX('I', 6, ANALOG)>; /* SAI2_SD_A */
+               };
+       };
+
        /omit-if-no-ref/
        sai2b_pins_a: sai2b-0 {
                pins1 {
@@ -2895,6 +3026,39 @@
                };
        };
 
+       /omit-if-no-ref/
+       uart4_pins_f: uart4-5 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('B', 9, AF8)>; /* UART4_TX */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <0>;
+               };
+               pins2 {
+                       pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
+                       bias-disable;
+               };
+       };
+
+       /omit-if-no-ref/
+       uart4_idle_pins_f: uart4-idle-5 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('B', 9, ANALOG)>; /* UART4_TX */
+               };
+               pins2 {
+                       pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
+                       bias-disable;
+               };
+       };
+
+       /omit-if-no-ref/
+       uart4_sleep_pins_f: uart4-sleep-5 {
+               pins {
+                       pinmux = <STM32_PINMUX('B', 9, ANALOG)>, /* UART4_TX */
+                                <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
+               };
+       };
+
        /omit-if-no-ref/
        uart5_pins_a: uart5-0 {
                pins1 {