--- /dev/null
+From 00c391102abc13763e2bfc90e05503109b19f074 Mon Sep 17 00:00:00 2001
+From: Aurabindo Pillai <aurabindo.pillai@amd.com>
+Date: Wed, 20 Mar 2024 13:56:16 -0400
+Subject: drm/amd/display: Add misc DC changes for DCN401
+
+From: Aurabindo Pillai <aurabindo.pillai@amd.com>
+
+commit 00c391102abc13763e2bfc90e05503109b19f074 upstream.
+
+Add miscellaneous changes to enable DCN401 init
+
+Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
+Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: Guenter Roeck <linux@roeck-us.net>
+[ strip out all of the lunacy in this patch and JUST take the #ifdef
+ fix which is needed to fix builds in the 6.10.y tree - gregkh ]
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+@@ -212,6 +212,7 @@ bool needs_dsc_aux_workaround(struct dc_
+ return false;
+ }
+
++#if defined(CONFIG_DRM_AMD_DC_FP)
+ static bool is_synaptics_cascaded_panamera(struct dc_link *link, struct drm_dp_mst_port *port)
+ {
+ u8 branch_vendor_data[4] = { 0 }; // Vendor data 0x50C ~ 0x50F
+@@ -271,6 +272,7 @@ static bool validate_dsc_caps_on_connect
+
+ return true;
+ }
++#endif
+
+ static bool retrieve_downstream_port_device(struct amdgpu_dm_connector *aconnector)
+ {
+@@ -404,9 +406,11 @@ static int dm_dp_mst_get_modes(struct dr
+ amdgpu_dm_update_freesync_caps(
+ connector, aconnector->edid);
+
++#if defined(CONFIG_DRM_AMD_DC_FP)
+ if (!validate_dsc_caps_on_connector(aconnector))
+ memset(&aconnector->dc_sink->dsc_caps,
+ 0, sizeof(aconnector->dc_sink->dsc_caps));
++#endif
+
+ if (!retrieve_downstream_port_device(aconnector))
+ memset(&aconnector->mst_downstream_port_present,
+@@ -798,6 +802,7 @@ struct dsc_mst_fairness_params {
+ struct amdgpu_dm_connector *aconnector;
+ };
+
++#if defined(CONFIG_DRM_AMD_DC_FP)
+ static int kbps_to_peak_pbn(int kbps)
+ {
+ u64 peak_kbps = kbps;
+@@ -1593,6 +1598,7 @@ static bool is_dsc_common_config_possibl
+
+ return bw_range->max_target_bpp_x16 && bw_range->min_target_bpp_x16;
+ }
++#endif
+
+ #if defined(CONFIG_DRM_AMD_DC_FP)
+ static bool dp_get_link_current_set_bw(struct drm_dp_aux *aux, uint32_t *cur_link_bw)