OMAP3: clock: add clockdomains for UART1 & 2

UART1 & 2 were missing clockdomains resulting in broken omap_hwmod
init for these devices.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c
index 8bdcc9cc7f9af0e1b6d092374278fec743c23487..c60b19a27232e7ce9e8b06755ff19730a755c8c5 100644 (file)
--- a/arch/arm/mach-omap2/clock34xx_data.c
+++ b/arch/arm/mach-omap2/clock34xx_data.c
@@ -1500,6 +1500,7 @@ static struct clk uart2_fck = {
        .parent         = &core_48m_fck,
        .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP3430_EN_UART2_SHIFT,
+       .clkdm_name     = "core_l4_clkdm",
        .recalc         = &followparent_recalc,
 };
 
@@ -1509,6 +1510,7 @@ static struct clk uart1_fck = {
        .parent         = &core_48m_fck,
        .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP3430_EN_UART1_SHIFT,
+       .clkdm_name     = "core_l4_clkdm",
        .recalc         = &followparent_recalc,
 };