zynq: spi: Add ZYNQ_QSPI_BASEADDR to hardware.h

And also remove all references to this hardcoded value.
It is next step for synchronization with mainlne
configuration style.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/include/asm/arch-zynq/hardware.h b/arch/arm/include/asm/arch-zynq/hardware.h
index 8b8a91ae65ffbc9117cc7b39aa2da647513bafc2..5e4f633a238decb41745cfc2192cf4553e7a2166 100644 (file)
--- a/arch/arm/include/asm/arch-zynq/hardware.h
+++ b/arch/arm/include/asm/arch-zynq/hardware.h
@@ -33,6 +33,7 @@
 #define ZYNQ_SDHCI_BASEADDR1           0xE0101000
 #define ZYNQ_I2C_BASEADDR0             0xE0004000
 #define ZYNQ_I2C_BASEADDR1             0xE0005000
+#define ZYNQ_QSPI_BASEADDR             0xE000D000
 
 /* Reflect slcr offsets */
 struct slcr_regs {

diff --git a/drivers/spi/zynq_qspips.c b/drivers/spi/zynq_qspips.c
index f17a25fc3b9ad6348e0c8e04f89ee628b5b8e2fe..3fd2d1849df14a4d82c5781d3176e94acf58637e 100644 (file)
--- a/drivers/spi/zynq_qspips.c
+++ b/drivers/spi/zynq_qspips.c
@@ -18,6 +18,7 @@
 #include <ubi_uboot.h>
 #include <spi.h>
 #include <asm/io.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 
 /* QSPI Transmit Data Register */
@@ -147,7 +148,7 @@ struct xqspips_regs {
        u32 midr;       /* 0xFC */
 };
 
-#define xqspips_base ((struct xqspips_regs *)XPSS_QSPI_BASEADDR)
+#define xqspips_base ((struct xqspips_regs *)ZYNQ_QSPI_BASEADDR)
 
 struct xqspips {
        u32 input_clk_hz;
@@ -927,7 +928,7 @@ void spi_enable_quad_bit(struct spi_slave *spi)
                        }
 
                        /* Write QUAD bit */
-                       xqspips_write_quad_bit((void *)XPSS_QSPI_BASEADDR);
+                       xqspips_write_quad_bit((void *)ZYNQ_QSPI_BASEADDR);
 
                        /* Read RDSR */
                        do {

diff --git a/include/configs/petalogix-arm-auto.h b/include/configs/petalogix-arm-auto.h
index 826babea5505c954827bacc5fff80920fe669042..13b797aa584411446da00496d2c7adb520c55321 100644 (file)
--- a/include/configs/petalogix-arm-auto.h
+++ b/include/configs/petalogix-arm-auto.h
@@ -13,11 +13,6 @@
 
 #define CONFIG_CPU_FREQ_HZ     XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ
 
-/* Must be removed */
-#if defined(XILINX_PS7_QSPI_FLASH_BASEADDR)
-#define XPSS_QSPI_BASEADDR             XILINX_PS7_QSPI_FLASH_BASEADDR
-#endif
-
 #if defined(XILINX_PS7_GEM_BASEADDR)
 # if (XILINX_PS7_GEM_BASEADDR == ZYNQ_GEM_BASEADDR0)
 #  define CONFIG_ZYNQ_GEM0

diff --git a/include/configs/zynq_common.h b/include/configs/zynq_common.h
index 1224fdc1fcb6dc40cb7d5bba929df394a0b02740..494c8e3f8e37be602b759857c6dc7f6e7bf01e79 100644 (file)
--- a/include/configs/zynq_common.h
+++ b/include/configs/zynq_common.h
@@ -283,7 +283,6 @@
 #undef CONFIG_BOOTM_NETBSD
 
 /* FIXME this should be removed pretty soon */
-#define XPSS_QSPI_BASEADDR             0xE000D000
 #define XPSS_NAND_BASEADDR             0xE1000000
 #define XPSS_CRTL_PARPORT_BASEADDR     0xE000E000