]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
pinctrl: qcom: Remove unused macro definitions
authorMaulik Shah <maulik.shah@oss.qualcomm.com>
Wed, 29 Apr 2026 06:15:45 +0000 (11:45 +0530)
committerLinus Walleij <linusw@kernel.org>
Wed, 6 May 2026 19:05:14 +0000 (21:05 +0200)
Remove SDC_QDSD_PINGROUP, QUP_I3C and UFS_RESET macros as on some
platforms they are unused.

No functional impact.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
drivers/pinctrl/qcom/pinctrl-eliza.c
drivers/pinctrl/qcom/pinctrl-qcm2290.c
drivers/pinctrl/qcom/pinctrl-qdu1000.c
drivers/pinctrl/qcom/pinctrl-sm4450.c

index 40e263e35b45fb3f0d367e395a371db4afbb6b60..de9783ab509ff7aae439d68a8f3190c770634000 100644 (file)
                .intr_detection_width = 2,      \
        }
 
-#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)     \
-       {                                               \
-               .grp = PINCTRL_PINGROUP(#pg_name,       \
-                       pg_name##_pins,                 \
-                       ARRAY_SIZE(pg_name##_pins)),    \
-               .ctl_reg = ctl,                         \
-               .io_reg = 0,                            \
-               .intr_cfg_reg = 0,                      \
-               .intr_status_reg = 0,                   \
-               .mux_bit = -1,                          \
-               .pull_bit = pull,                       \
-               .drv_bit = drv,                         \
-               .oe_bit = -1,                           \
-               .in_bit = -1,                           \
-               .out_bit = -1,                          \
-               .intr_enable_bit = -1,                  \
-               .intr_status_bit = -1,                  \
-               .intr_target_bit = -1,                  \
-               .intr_raw_status_bit = -1,              \
-               .intr_polarity_bit = -1,                \
-               .intr_detection_bit = -1,               \
-               .intr_detection_width = -1,             \
-       }
-
 #define UFS_RESET(pg_name, ctl, io)                    \
        {                                               \
                .grp = PINCTRL_PINGROUP(#pg_name,       \
index 3b28ac4988859238417d0c4f483e718065ccf48f..844d3dc9e72cdc4b77a58ce8c11a0ff85cb8d6fa 100644 (file)
                .intr_detection_width = -1,             \
        }
 
-#define UFS_RESET(pg_name, offset)                             \
-       {                                               \
-               .grp = PINCTRL_PINGROUP(#pg_name,       \
-                       pg_name##_pins,                 \
-                       ARRAY_SIZE(pg_name##_pins)),    \
-               .ctl_reg = offset,                      \
-               .io_reg = offset + 0x4,                 \
-               .intr_cfg_reg = 0,                      \
-               .intr_status_reg = 0,                   \
-               .mux_bit = -1,                          \
-               .pull_bit = 3,                          \
-               .drv_bit = 0,                           \
-               .oe_bit = -1,                           \
-               .in_bit = -1,                           \
-               .out_bit = 0,                           \
-               .intr_enable_bit = -1,                  \
-               .intr_status_bit = -1,                  \
-               .intr_target_bit = -1,                  \
-               .intr_raw_status_bit = -1,              \
-               .intr_polarity_bit = -1,                \
-               .intr_detection_bit = -1,               \
-               .intr_detection_width = -1,             \
-       }
 static const struct pinctrl_pin_desc qcm2290_pins[] = {
        PINCTRL_PIN(0, "GPIO_0"),
        PINCTRL_PIN(1, "GPIO_1"),
index 5125df7eb12722912ecf0a14d65d6da4f77f9933..77da87aa72aa2b631fdc24def7d651b6c8a8ffff 100644 (file)
                .intr_detection_width = -1,             \
        }
 
-#define QUP_I3C(qup_mode, qup_offset)                  \
-       {                                               \
-               .mode = qup_mode,                       \
-               .offset = qup_offset,                   \
-       }
-
 static const struct pinctrl_pin_desc qdu1000_pins[] = {
        PINCTRL_PIN(0, "GPIO_0"),
        PINCTRL_PIN(1, "GPIO_1"),
index 83650f173b0132e7f96f6c558868f57f63d7158a..51a66a20dc6635fb74e083c8fb1012491a8cb055 100644 (file)
                .intr_detection_width = -1,             \
        }
 
-#define QUP_I3C(qup_mode, qup_offset)                  \
-       {                                               \
-               .mode = qup_mode,                       \
-               .offset = qup_offset,                   \
-       }
-
-
 static const struct pinctrl_pin_desc sm4450_pins[] = {
        PINCTRL_PIN(0, "GPIO_0"),
        PINCTRL_PIN(1, "GPIO_1"),