]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
Daily bump.
authorGCC Administrator <gccadmin@gcc.gnu.org>
Tue, 24 Oct 2023 00:17:34 +0000 (00:17 +0000)
committerGCC Administrator <gccadmin@gcc.gnu.org>
Tue, 24 Oct 2023 00:17:34 +0000 (00:17 +0000)
gcc/ChangeLog
gcc/DATESTAMP
gcc/c-family/ChangeLog
gcc/objc/ChangeLog
gcc/testsuite/ChangeLog
libatomic/ChangeLog
libcpp/ChangeLog
libquadmath/ChangeLog

index 7e624d00fdee05474f532e320e4ac1c5dcae05d2..77593517e3d3bda1d76ccfc59a64c2c63c9d02f0 100644 (file)
@@ -1,3 +1,271 @@
+2023-10-23  Lewis Hyatt  <lhyatt@gmail.com>
+
+       PR preprocessor/36887
+       * toplev.h (ident_hash_extra): Declare...
+       * stringpool.cc (ident_hash_extra): ...this new global variable.
+       (init_stringpool): Handle ident_hash_extra as well as ident_hash.
+       (ggc_mark_stringpool): Likewise.
+       (ggc_purge_stringpool): Likewise.
+       (struct string_pool_data_extra): New struct.
+       (spd2): New GC root variable.
+       (gt_pch_save_stringpool): Use spd2 to handle ident_hash_extra,
+       analogous to how spd is used to handle ident_hash.
+       (gt_pch_restore_stringpool): Likewise.
+
+2023-10-23  Robin Dapp  <rdapp@ventanamicro.com>
+
+       PR tree-optimization/111794
+       * tree-vect-stmts.cc (vectorizable_assignment): Add
+       same-precision exception for dest and source.
+
+2023-10-23  Robin Dapp  <rdapp@ventanamicro.com>
+
+       * config/riscv/autovec.md (popcount<mode>2): New expander.
+       * config/riscv/riscv-protos.h (expand_popcount): Define.
+       * config/riscv/riscv-v.cc (expand_popcount): Vectorize popcount
+       with the WWG algorithm.
+
+2023-10-23  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/111916
+       * tree-sra.cc (sra_modify_assign): Do not lower all
+       BIT_FIELD_REF reads that are sra_handled_bf_read_p.
+
+2023-10-23  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/111915
+       * tree-vect-slp.cc (vect_build_slp_tree_1): Check all
+       accesses are either grouped or not.
+
+2023-10-23  Richard Biener  <rguenther@suse.de>
+
+       PR ipa/111914
+       * tree-inline.cc (setup_one_parameter): Move code emitting
+       a dummy load when not optimizing ...
+       (initialize_inlined_parameters): ... here to after when
+       we remapped the parameter type.
+
+2023-10-23  Oleg Endo  <olegendo@gcc.gnu.org>
+
+       PR target/111001
+       * config/sh/sh_treg_combine.cc (sh_treg_combine::record_set_of_reg):
+       Skip over nop move insns.
+
+2023-10-23  Tamar Christina  <tamar.christina@arm.com>
+
+       PR tree-optimization/111860
+       * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
+       Drop .MEM nodes only.
+
+2023-10-23  Andrew Pinski  <apinski@marvell.com>
+
+       * match.pd (`(A - B) CMP 0 ? (A - B) : (B - A)`):
+       New patterns.
+
+2023-10-23  Andrew Pinski  <pinskia@gmail.com>
+
+       * convert.cc (convert_to_pointer_1): Return error_mark_node
+       after an error.
+       (convert_to_real_1): Likewise.
+       (convert_to_integer_1): Likewise.
+       (convert_to_complex_1): Likewise.
+
+2023-10-23  Andrew Pinski  <pinskia@gmail.com>
+
+       PR c/111903
+       * convert.cc (convert_to_complex_1): Return
+       error_mark_node if either convert was an error
+       when converting from a scalar.
+
+2023-10-23  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/111917
+       * tree-ssa-loop-unswitch.cc (hoist_guard): Always insert
+       new conditional after last stmt.
+
+2023-10-23  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+       PR target/111927
+       * config/riscv/riscv-vsetvl.cc: Fix bug.
+
+2023-10-23  Pan Li  <pan2.li@intel.com>
+
+       * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): Add insn type
+       arg.
+       (expand_vec_trunc): Take MA instead of MU for cvt_x_f_rtz.
+
+2023-10-23  Xi Ruoyao  <xry111@xry111.site>
+
+       * doc/invoke.texi (-mexplicit-relocs=style): Document.
+       (-mexplicit-relocs): Document as an alias of
+       -mexplicit-relocs=always.
+       (-mno-explicit-relocs): Document as an alias of
+       -mexplicit-relocs=none.
+       (-mcmodel=extreme): Mention -mexplicit-relocs=always instead of
+       -mexplicit-relocs.
+
+2023-10-23  Xi Ruoyao  <xry111@xry111.site>
+
+       * config/loongarch/predicates.md (symbolic_pcrel_operand): New
+       predicate.
+       * config/loongarch/loongarch.md (define_peephole2): Optimize
+       la.local + ld/st to pcalau12i + ld/st if the address is only used
+       once if -mexplicit-relocs=auto and -mcmodel=normal or medium.
+
+2023-10-23  Xi Ruoyao  <xry111@xry111.site>
+
+       * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
+       Return true for TLS symbol types if -mexplicit-relocs=auto.
+       (loongarch_call_tls_get_addr): Replace TARGET_EXPLICIT_RELOCS
+       with la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE.
+       (loongarch_legitimize_tls_address): Likewise.
+       * config/loongarch/loongarch.md (@tls_low<mode>): Remove
+       TARGET_EXPLICIT_RELOCS from insn condition.
+
+2023-10-23  Xi Ruoyao  <xry111@xry111.site>
+
+       * config/loongarch/loongarch-protos.h
+       (loongarch_explicit_relocs_p): Declare new function.
+       * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
+       Implement.
+       (loongarch_symbol_insns): Call loongarch_explicit_relocs_p for
+       SYMBOL_GOT_DISP, instead of using TARGET_EXPLICIT_RELOCS.
+       (loongarch_split_symbol): Call loongarch_explicit_relocs_p for
+       deciding if return early, instead of using
+       TARGET_EXPLICIT_RELOCS.
+       (loongarch_output_move): CAll loongarch_explicit_relocs_p
+       instead of using TARGET_EXPLICIT_RELOCS.
+       * config/loongarch/loongarch.md (*low<mode>): Remove
+       TARGET_EXPLICIT_RELOCS from insn condition.
+       (@ld_from_got<mode>): Likewise.
+       * config/loongarch/predicates.md (move_operand): Call
+       loongarch_explicit_relocs_p instead of using
+       TARGET_EXPLICIT_RELOCS.
+
+2023-10-23  Xi Ruoyao  <xry111@xry111.site>
+
+       * config/loongarch/genopts/loongarch-strings: Add strings for
+       -mexplicit-relocs={auto,none,always}.
+       * config/loongarch/genopts/loongarch.opt.in: Add options for
+       -mexplicit-relocs={auto,none,always}.
+       * config/loongarch/loongarch-str.h: Regenerate.
+       * config/loongarch/loongarch.opt: Regenerate.
+       * config/loongarch/loongarch-def.h
+       (EXPLICIT_RELOCS_AUTO): Define.
+       (EXPLICIT_RELOCS_NONE): Define.
+       (EXPLICIT_RELOCS_ALWAYS): Define.
+       (N_EXPLICIT_RELOCS_TYPES): Define.
+       * config/loongarch/loongarch.cc
+       (loongarch_option_override_internal): Error out if the old-style
+       -m[no-]explicit-relocs option is used with
+       -mexplicit-relocs={auto,none,always} together.  Map
+       -mno-explicit-relocs to -mexplicit-relocs=none and
+       -mexplicit-relocs to -mexplicit-relocs=always for backward
+       compatibility.  Set a proper default for -mexplicit-relocs=
+       based on configure-time probed linker capability.  Update a
+       diagnostic message to mention -mexplicit-relocs=always instead
+       of the old-style -mexplicit-relocs.
+       (loongarch_handle_model_attribute): Update a diagnostic message
+       to mention -mexplicit-relocs=always instead of the old-style
+       -mexplicit-relocs.
+       * config/loongarch/loongarch.h (TARGET_EXPLICIT_RELOCS): Define.
+
+2023-10-23  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+       * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Fix typo.
+       (pre_vsetvl::pre_global_vsetvl_info): Ditto.
+
+2023-10-23  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+       * config/riscv/vector.md: Fix avl_type attribute of tuple mov<mode>.
+
+2023-10-23  Kewen Lin  <linkw@linux.ibm.com>
+
+       PR tree-optimization/111784
+       * tree-vect-stmts.cc (vectorizable_store): Adjust costing way for
+       adjacent vector stores, by costing them with the total number
+       rather than costing them one by one.
+       (vectorizable_load): Adjust costing way for adjacent vector
+       loads, by costing them with the total number rather than costing
+       them one by one.
+
+2023-10-23  Haochen Jiang  <haochen.jiang@intel.com>
+
+       PR target/111753
+       * config/i386/i386.cc (ix86_standard_x87sse_constant_load_p):
+       Do not split to xmm16+ when !TARGET_AVX512VL.
+
+2023-10-23  Pan Li  <pan2.li@intel.com>
+
+       * config/riscv/riscv-protos.h (enum insn_type): Add new type
+       values.
+       * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): Add undef merge
+       operand handling.
+       (expand_vec_ceil): Take MA instead of MU for tmp register.
+       (expand_vec_floor): Ditto.
+       (expand_vec_nearbyint): Ditto.
+       (expand_vec_rint): Ditto.
+       (expand_vec_round): Ditto.
+       (expand_vec_roundeven): Ditto.
+
+2023-10-23  Lulu Cheng  <chenglulu@loongson.cn>
+
+       * config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition.
+
+2023-10-23  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+       PR target/111449
+       * expr.cc (can_use_qi_vectors): New function to return true if
+       we know how to implement OP using vectors of bytes.
+       (qi_vector_mode_supported_p): New function to check if optabs
+       exists for the mode and certain by pieces operations.
+       (widest_fixed_size_mode_for_size): Replace the second argument
+       with the type of by pieces operations.  Call can_use_qi_vectors
+       and qi_vector_mode_supported_p to do the check.  Call
+       scalar_mode_supported_p to check if the scalar mode is supported.
+       (by_pieces_ninsns): Pass the type of by pieces operation to
+       widest_fixed_size_mode_for_size.
+       (class op_by_pieces_d): Remove m_qi_vector_mode.  Add m_op to
+       record the type of by pieces operations.
+       (op_by_pieces_d::op_by_pieces_d): Change last argument to the
+       type of by pieces operations, initialize m_op with it.  Pass
+       m_op to function widest_fixed_size_mode_for_size.
+       (op_by_pieces_d::get_usable_mode): Pass m_op to function
+       widest_fixed_size_mode_for_size.
+       (op_by_pieces_d::smallest_fixed_size_mode_for_size): Call
+       can_use_qi_vectors and qi_vector_mode_supported_p to do the
+       check.
+       (op_by_pieces_d::run): Pass m_op to function
+       widest_fixed_size_mode_for_size.
+       (move_by_pieces_d::move_by_pieces_d): Set m_op to MOVE_BY_PIECES.
+       (store_by_pieces_d::store_by_pieces_d): Set m_op with the op.
+       (can_store_by_pieces): Pass the type of by pieces operations to
+       widest_fixed_size_mode_for_size.
+       (clear_by_pieces): Initialize class store_by_pieces_d with
+       CLEAR_BY_PIECES.
+       (compare_by_pieces_d::compare_by_pieces_d): Set m_op to
+       COMPARE_BY_PIECES.
+
+2023-10-23  liuhongt  <hongtao.liu@intel.com>
+
+       PR tree-optimization/111820
+       PR tree-optimization/111833
+       * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): Give
+       up vectorization for nonlinear iv vect_step_op_mul when
+       step_expr is not exact_log2 and niters is greater than
+       TYPE_PRECISION (TREE_TYPE (step_expr)). Also don't vectorize
+       for nagative niters_skip which will be used by fully masked
+       loop.
+       (vect_can_advance_ivs_p): Pass whole phi_info to
+       vect_can_peel_nonlinear_iv_p.
+       * tree-vect-loop.cc (vect_peel_nonlinear_iv_init): Optimize
+       init_expr * pow (step_expr, skipn) to init_expr
+       << (log2 (step_expr) * skipn) when step_expr is exact_log2.
+
+2023-10-23  liuhongt  <hongtao.liu@intel.com>
+
+       * config/i386/mmx.md (mmx_pinsrw): Remove.
+
 2023-10-22  Andrew Pinski  <pinskia@gmail.com>
 
        PR target/110986
index 909fbcdf47ebc179f80d44d0438d32f5ee7337fe..2b20a22545d4f8753462aa593842c70a2bdbdbea 100644 (file)
@@ -1 +1 @@
-20231023
+20231024
index 25f583cd92f57a4728b8382adb2fd02fdc19156a..5da9141e51e1891324146078bc6d59684e000d58 100644 (file)
@@ -1,3 +1,9 @@
+2023-10-23  Lewis Hyatt  <lhyatt@gmail.com>
+
+       PR preprocessor/36887
+       * c-opts.cc (c_common_init_options): Pass new extra hash map
+       argument to cpp_create_reader().
+
 2023-10-20  Marek Polacek  <polacek@redhat.com>
 
        PR c/111884
index 155efd18df2df2c0a9951a1cad3261f3b75dfe44..1f8f400f4a1ccd711aa5784ceacff898fc05b861 100644 (file)
@@ -1,3 +1,10 @@
+2023-10-23  Andrew Pinski  <pinskia@gmail.com>
+
+       * objc-gnu-runtime-abi-01.cc (build_objc_method_call): Allow
+       for error_operand after call to build_c_cast.
+       * objc-next-runtime-abi-01.cc (build_objc_method_call): Likewise.
+       * objc-next-runtime-abi-02.cc (build_v2_build_objc_method_call): Likewise.
+
 2023-08-31  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
 
        * objc-act.cc: Change spelling to macOS.
index 88b5299f5f8aa585e3f777e9e4c7767b80bfefc5..d43f4efaf828500e256b0ca7d04790aa5f714b58 100644 (file)
@@ -1,3 +1,228 @@
+2023-10-23  Lewis Hyatt  <lhyatt@gmail.com>
+
+       PR preprocessor/36887
+       * c-c++-common/cpp/diagnostic-poison.c: New test.
+       * g++.dg/pch/pr36887.C: New test.
+       * g++.dg/pch/pr36887.Hs: New test.
+
+2023-10-23  Robin Dapp  <rdapp@ventanamicro.com>
+
+       * gcc.target/riscv/rvv/autovec/slp-mask-1.c: New test.
+       * gcc.target/riscv/rvv/autovec/slp-mask-run-1.c: New test.
+
+2023-10-23  Robin Dapp  <rdapp@ventanamicro.com>
+
+       * gcc.target/riscv/rvv/autovec/unop/popcount-1.c: New test.
+       * gcc.target/riscv/rvv/autovec/unop/popcount-2.c: New test.
+       * gcc.target/riscv/rvv/autovec/unop/popcount-run-1.c: New test.
+       * gcc.target/riscv/rvv/autovec/unop/popcount.c: New test.
+
+2023-10-23  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/111916
+       * gcc.dg/torture/pr111916.c: New testcase.
+
+2023-10-23  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/111915
+       * gcc.dg/vect/pr111915.c: New testcase.
+
+2023-10-23  Richard Biener  <rguenther@suse.de>
+
+       PR ipa/111914
+       * gcc.dg/pr111914.c: New testcase.
+
+2023-10-23  Tamar Christina  <tamar.christina@arm.com>
+
+       PR tree-optimization/111860
+       * gcc.dg/vect/pr111860-2.c: New test.
+       * gcc.dg/vect/pr111860-3.c: New test.
+
+2023-10-23  Andrew Pinski  <apinski@marvell.com>
+
+       * gcc.dg/tree-ssa/phi-opt-38.c: New test.
+
+2023-10-23  Andrew Pinski  <pinskia@gmail.com>
+
+       PR c/111903
+       * gcc.target/i386/float16-8.c: New test.
+
+2023-10-23  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/111917
+       * gcc.dg/torture/pr111917.c: New testcase.
+
+2023-10-23  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+       PR target/111927
+       * gcc.target/riscv/rvv/vsetvl/pr111927.c: New test.
+
+2023-10-23  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/unop/cvt-0.c: Remove the vsetvl
+       asm check from func body.
+       * gcc.target/riscv/rvv/autovec/unop/cvt-1.c: Ditto.
+
+2023-10-23  Xi Ruoyao  <xry111@xry111.site>
+
+       * gcc.target/loongarch/explicit-relocs-auto-single-load-store.c:
+       New test.
+       * gcc.target/loongarch/explicit-relocs-auto-single-load-store-no-anchor.c:
+       New test.
+
+2023-10-23  Xi Ruoyao  <xry111@xry111.site>
+
+       * gcc.target/loongarch/explicit-relocs-auto-tls-ld-gd.c: New
+       test.
+       * gcc.target/loongarch/explicit-relocs-auto-tls-le-ie.c: New
+       test.
+
+2023-10-23  Xi Ruoyao  <xry111@xry111.site>
+
+       * gcc.target/loongarch/explicit-relocs-auto-lto.c: New test.
+
+2023-10-23  Florian Weimer  <fweimer@redhat.com>
+
+       * gcc.c-torture/execute/builtins/pr93262-chk.c (main_test):
+       Remove unnecessary return statement.
+
+2023-10-23  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/base/binop_vv_constraint-1.c: Remove the
+       vsetvl asm check from func body.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-1.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-10.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-11.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-12.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-129.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-13.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-130.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-131.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-133.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-134.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-135.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-14.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-15.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-153.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-154.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-155.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-158.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-16.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-17.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-171.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-172.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-173.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-174.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-18.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-19.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-2.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-20.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-21.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-22.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-23.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-24.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-25.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-26.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-27.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-28.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-29.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-3.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-30.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-31.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-32.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-33.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-34.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-35.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-36.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-37.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-38.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-39.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-4.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-40.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-41.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-42.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-43.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-44.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-5.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-6.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-7.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-8.c: Ditto.
+       * gcc.target/riscv/rvv/base/binop_vx_constraint-9.c: Ditto.
+       * gcc.target/riscv/rvv/base/shift_vx_constraint-1.c: Ditto.
+       * gcc.target/riscv/rvv/base/ternop_vv_constraint-1.c: Ditto.
+       * gcc.target/riscv/rvv/base/ternop_vv_constraint-2.c: Ditto.
+       * gcc.target/riscv/rvv/base/ternop_vv_constraint-3.c: Ditto.
+       * gcc.target/riscv/rvv/base/ternop_vv_constraint-4.c: Ditto.
+       * gcc.target/riscv/rvv/base/ternop_vv_constraint-5.c: Ditto.
+       * gcc.target/riscv/rvv/base/ternop_vv_constraint-6.c: Ditto.
+       * gcc.target/riscv/rvv/base/ternop_vx_constraint-1.c: Ditto.
+       * gcc.target/riscv/rvv/base/ternop_vx_constraint-8.c: Ditto.
+       * gcc.target/riscv/rvv/base/ternop_vx_constraint-9.c: Ditto.
+       * gcc.target/riscv/rvv/base/unop_v_constraint-1.c: Ditto.
+       * gcc.target/riscv/rvv/base/unop_v_constraint-2.c: Ditto.
+
+2023-10-23  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/unop/bswap16-0.c: Remove the
+       vsetvl check.
+       * gcc.target/riscv/rvv/autovec/unop/math-ceil-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-ceil-1.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-ceil-2.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-ceil-3.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-floor-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-floor-1.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-floor-2.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-floor-3.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-iceil-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-ifloor-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-irint-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-iround-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-lceil-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-lceil-1.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-lfloor-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-lfloor-1.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-llceil-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-llfloor-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-llrint-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-llround-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-lrint-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-lrint-1.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-lround-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-lround-1.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-nearbyint-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-nearbyint-1.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-nearbyint-2.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-nearbyint-3.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-rint-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-rint-1.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-rint-2.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-rint-3.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-round-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-round-1.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-round-2.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-round-3.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-roundeven-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-roundeven-1.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-roundeven-2.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-roundeven-3.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-trunc-0.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-trunc-1.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-trunc-2.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/math-trunc-3.c: Ditto.
+
+2023-10-23  Haochen Jiang  <haochen.jiang@intel.com>
+
+       PR target/111753
+       * gcc.target/i386/pr111753.c: New test.
+
+2023-10-23  liuhongt  <hongtao.liu@intel.com>
+
+       * gcc.target/i386/pr111820-1.c: New test.
+       * gcc.target/i386/pr111820-2.c: New test.
+       * gcc.target/i386/pr111820-3.c: New test.
+       * gcc.target/i386/pr103144-mul-1.c: Adjust testcase.
+       * gcc.target/i386/pr103144-mul-2.c: Adjust testcase.
+
 2023-10-22  Andrew Pinski  <pinskia@gmail.com>
 
        PR target/110986
index 8978afbf3265b9a6296695750440a3924e33c94c..b639ebbc5c0283122c5d9506ecb674fd71cac6d9 100644 (file)
@@ -1,3 +1,8 @@
+2023-10-23  Jan Beulich  <jbeulich@suse.com>
+
+       * Makefile.am (all-multi): Drop commands.
+       * Makefile.in: Update accordingly.
+
 2023-10-22  Iain Sandoe  <iain@sandoe.co.uk>
 
        * testsuite/lib/libatomic.exp: Pass correct flags on darwin.
index 9d2e4f50de86e34f171d872c00da1b8f0be95414..46cc622f41fab37aed964129f7b0f3f68f94fd22 100644 (file)
@@ -1,3 +1,22 @@
+2023-10-23  Lewis Hyatt  <lhyatt@gmail.com>
+
+       PR preprocessor/36887
+       * directives.cc (do_pragma_poison): Store in the extra hash map the
+       location from which an identifier has been poisoned.
+       * lex.cc (identifier_diagnostics_on_lex): When issuing a diagnostic
+       for the use of a poisoned identifier, also add a note indicating the
+       location from which it was poisoned.
+       * identifiers.cc (alloc_node): Convert to template function.
+       (_cpp_init_hashtable): Handle the new extra hash map.
+       (_cpp_destroy_hashtable): Likewise.
+       * include/cpplib.h (struct cpp_hashnode_extra): New struct.
+       (cpp_create_reader): Update prototype to...
+       * init.cc (cpp_create_reader): ...accept an argument for the extra
+       hash table and pass it to _cpp_init_hashtable.
+       * include/symtab.h (ht_lookup): New overload for convenience.
+       * internal.h (struct cpp_reader): Add EXTRA_HASH_TABLE member.
+       (_cpp_init_hashtable): Adjust prototype.
+
 2023-10-08  David Malcolm  <dmalcolm@redhat.com>
 
        * include/line-map.h (LINEMAPS_ORDINARY_MAPS): Delete.
index ee5a03ba168f71b209d5a8236dc42a1730a7b3e2..e449028fc0003a54e3c06dec58ad93408d42162a 100644 (file)
@@ -1,3 +1,10 @@
+2023-10-23  Iain Sandoe  <iain@sandoe.co.uk>
+
+       PR libquadmath/111928
+       * Makefile.in: Regenerate.
+       * configure: Regenerate.
+       * configure.ac: Remove AC_CHECK_LIBM.
+
 2023-10-22  Iain Sandoe  <iain@sandoe.co.uk>
 
        * Makefile.am: Handle Darwin rpaths.