drm/i915/ltphy: Define LT PHY PLL state verify function

Define function to verify the LT PHY PLL state function and call it
in intel_modeset_verify_crtc.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patch.msgid.link/20251101032513.4171255-24-suraj.kandpal@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 22eea532cd0f95f20bc95c11b977d7de1d74ad55..b3b506d0e0402cb0442067cab612ddaf839e6c3a 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -3575,7 +3575,7 @@ void intel_cx0pll_state_verify(struct intel_atomic_state *state,
        struct intel_encoder *encoder;
        struct intel_cx0pll_state mpll_hw_state = {};
 
-       if (DISPLAY_VER(display) < 14)
+       if (!IS_DISPLAY_VER(display, 14, 30))
                return;
 
        if (!new_crtc_state->hw.active)

diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
index e51d941f3c1de32ab62f3e09f3558e51ceeda54f..ca5f85c4de530d7eb113210106a9613ef29b2c4e 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
@@ -1919,6 +1919,61 @@ void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder,
        intel_lt_phy_transaction_end(encoder, wakeref);
 }
 
+void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state,
+                                  struct intel_crtc *crtc)
+{
+       struct intel_display *display = to_intel_display(state);
+       struct intel_digital_port *dig_port;
+       const struct intel_crtc_state *new_crtc_state =
+               intel_atomic_get_new_crtc_state(state, crtc);
+       struct intel_encoder *encoder;
+       struct intel_lt_phy_pll_state pll_hw_state = {};
+       const struct intel_lt_phy_pll_state *pll_sw_state = &new_crtc_state->dpll_hw_state.ltpll;
+       int clock;
+       int i, j;
+
+       if (DISPLAY_VER(display) < 35)
+               return;
+
+       if (!new_crtc_state->hw.active)
+               return;
+
+       /* intel_get_crtc_new_encoder() only works for modeset/fastset commits */
+       if (!intel_crtc_needs_modeset(new_crtc_state) &&
+           !intel_crtc_needs_fastset(new_crtc_state))
+               return;
+
+       encoder = intel_get_crtc_new_encoder(state, new_crtc_state);
+       intel_lt_phy_pll_readout_hw_state(encoder, new_crtc_state, &pll_hw_state);
+       clock = intel_lt_phy_calc_port_clock(encoder, new_crtc_state);
+
+       dig_port = enc_to_dig_port(encoder);
+       if (intel_tc_port_in_tbt_alt_mode(dig_port))
+               return;
+
+       INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.clock != clock,
+                                "[CRTC:%d:%s] mismatch in LT PHY: Register CLOCK (expected %d, found %d)",
+                                crtc->base.base.id, crtc->base.name,
+                                pll_sw_state->clock, pll_hw_state.clock);
+
+       for (i = 0; i < 3; i++) {
+               INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[i] != pll_sw_state->config[i],
+                                        "[CRTC:%d:%s] mismatch in LT PHY PLL CONFIG%d: (expected 0x%04x, found 0x%04x)",
+                                        crtc->base.base.id, crtc->base.name, i,
+                                        pll_sw_state->config[i], pll_hw_state.config[i]);
+       }
+
+       for (i = 0; i <= 12; i++) {
+               for (j = 3; j >= 0; j--)
+                       INTEL_DISPLAY_STATE_WARN(display,
+                                                pll_hw_state.data[i][j] !=
+                                                pll_sw_state->data[i][j],
+                                                "[CRTC:%d:%s] mismatch in LT PHY PLL DATA[%d][%d]: (expected 0x%04x, found 0x%04x)",
+                                                crtc->base.base.id, crtc->base.name, i, j,
+                                                pll_sw_state->data[i][j], pll_hw_state.data[i][j]);
+       }
+}
+
 void intel_xe3plpd_pll_enable(struct intel_encoder *encoder,
                              const struct intel_crtc_state *crtc_state)
 {
@@ -1938,4 +1993,5 @@ void intel_xe3plpd_pll_disable(struct intel_encoder *encoder)
                intel_mtl_tbt_pll_disable(encoder);
        else
                intel_lt_phy_pll_disable(encoder);
+
 }

diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.h b/drivers/gpu/drm/i915/display/intel_lt_phy.h
index dd8cbb151b236c9f06fe1c8c08a72cbceac60c1d..a538d4c692102749bb0e2cc09a9ffc9035635280 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_lt_phy.h
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy.h
@@ -8,9 +8,11 @@
 
 #include <linux/types.h>
 
+struct intel_atomic_state;
 struct intel_display;
 struct intel_encoder;
 struct intel_crtc_state;
+struct intel_crtc;
 struct intel_lt_phy_pll_state;
 
 void intel_lt_phy_pll_enable(struct intel_encoder *encoder,
@@ -31,6 +33,8 @@ intel_lt_phy_pll_compare_hw_state(const struct intel_lt_phy_pll_state *a,
 void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder,
                                       const struct intel_crtc_state *crtc_state,
                                       struct intel_lt_phy_pll_state *pll_state);
+void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state,
+                                  struct intel_crtc *crtc);
 void intel_xe3plpd_pll_enable(struct intel_encoder *encoder,
                              const struct intel_crtc_state *crtc_state);
 void intel_xe3plpd_pll_disable(struct intel_encoder *encoder);

diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
index f2f6b9d9afa10b921d991a34de9b59b19317b544..b361a77cd235c16f744caff1226f9da8a6757619 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
@@ -16,6 +16,7 @@
 #include "intel_display_core.h"
 #include "intel_display_types.h"
 #include "intel_fdi.h"
+#include "intel_lt_phy.h"
 #include "intel_modeset_verify.h"
 #include "intel_snps_phy.h"
 #include "skl_watermark.h"
@@ -246,6 +247,7 @@ void intel_modeset_verify_crtc(struct intel_atomic_state *state,
        intel_dpll_state_verify(state, crtc);
        intel_mpllb_state_verify(state, crtc);
        intel_cx0pll_state_verify(state, crtc);
+       intel_lt_phy_pll_state_verify(state, crtc);
 }
 
 void intel_modeset_verify_disabled(struct intel_atomic_state *state)