]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
aarch64: Fix wrong code with st64b builtin [PR110100]
authorAlex Coplan <alex.coplan@arm.com>
Tue, 6 Jun 2023 10:52:19 +0000 (11:52 +0100)
committerAlex Coplan <alex.coplan@arm.com>
Tue, 20 Jun 2023 21:21:26 +0000 (22:21 +0100)
The st64b pattern incorrectly had an output constraint on the register
operand containing the destination address for the store, leading to
wrong code. This patch fixes that.

gcc/ChangeLog:

PR target/110100
* config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
Use input operand for the destination address.
* config/aarch64/aarch64.md (st64b): Fix constraint on address
operand.

gcc/testsuite/ChangeLog:

PR target/110100
* gcc.target/aarch64/acle/pr110100.c: New test.

(cherry picked from commit 737a0b749a7bc3e7cb904ea2d4b18dc130514b85)

gcc/config/aarch64/aarch64-builtins.cc
gcc/config/aarch64/aarch64.md
gcc/testsuite/gcc.target/aarch64/acle/pr110100.c [new file with mode: 0644]

index 7c7a44e5808f82291d07c21652fcf82e9bf396d6..285a43e3cbd058637367c38dcb52532e6334b976 100644 (file)
@@ -2496,7 +2496,7 @@ aarch64_expand_builtin_ls64 (int fcode, tree exp, rtx target)
       {
        rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
        rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
-       create_output_operand (&ops[0], op0, DImode);
+       create_input_operand (&ops[0], op0, DImode);
        create_input_operand (&ops[1], op1, V8DImode);
        expand_insn (CODE_FOR_st64b, 2, ops);
        return const0_rtx;
index d59694b69ca1c2d774411620a0cfe4cb3d62c1b1..36d0bb3f718883410304db7f0a8f5d8b096839ee 100644 (file)
 )
 
 (define_insn "st64b"
-  [(set (mem:V8DI (match_operand:DI 0 "register_operand" "=r"))
+  [(set (mem:V8DI (match_operand:DI 0 "register_operand" "r"))
        (unspec_volatile:V8DI [(match_operand:V8DI 1 "register_operand" "r")]
            UNSPEC_ST64B)
   )]
diff --git a/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c b/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c
new file mode 100644 (file)
index 0000000..f56d5e6
--- /dev/null
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-march=armv8.7-a -O2" } */
+#include <arm_acle.h>
+void do_st64b(data512_t data) {
+  __arm_st64b((void*)0x10000000, data);
+}
+/* { dg-final { scan-assembler {mov\tx([123])?[0-9], 268435456} } } */