drm/amdgpu: add support for cyan skillfish without IP discovery

For platforms without an IP discovery table.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index efe0058b48ca85fd9d243695a744b50c60a106cc..38c4ebc063db2db726c89e33b3538ff790537a8d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -2746,6 +2746,36 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
                adev->ip_versions[UVD_HWIP][1] = IP_VERSION(2, 6, 0);
                adev->ip_versions[XGMI_HWIP][0] = IP_VERSION(6, 1, 0);
                break;
+       case CHIP_CYAN_SKILLFISH:
+               if (adev->apu_flags & AMD_APU_IS_CYAN_SKILLFISH2) {
+                       r = amdgpu_discovery_reg_base_init(adev);
+                       if (r)
+                               return -EINVAL;
+
+                       amdgpu_discovery_harvest_ip(adev);
+                       amdgpu_discovery_get_gfx_info(adev);
+                       amdgpu_discovery_get_mall_info(adev);
+                       amdgpu_discovery_get_vcn_info(adev);
+               } else {
+                       cyan_skillfish_reg_base_init(adev);
+                       adev->sdma.num_instances = 2;
+                       adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(2, 0, 3);
+                       adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(2, 0, 3);
+                       adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(5, 0, 1);
+                       adev->ip_versions[HDP_HWIP][0] = IP_VERSION(5, 0, 1);
+                       adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(5, 0, 1);
+                       adev->ip_versions[SDMA1_HWIP][1] = IP_VERSION(5, 0, 1);
+                       adev->ip_versions[DF_HWIP][0] = IP_VERSION(3, 5, 0);
+                       adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(2, 1, 1);
+                       adev->ip_versions[UMC_HWIP][0] = IP_VERSION(8, 1, 1);
+                       adev->ip_versions[MP0_HWIP][0] = IP_VERSION(11, 0, 8);
+                       adev->ip_versions[MP1_HWIP][0] = IP_VERSION(11, 0, 8);
+                       adev->ip_versions[THM_HWIP][0] = IP_VERSION(11, 0, 1);
+                       adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(11, 0, 8);
+                       adev->ip_versions[GC_HWIP][0] = IP_VERSION(10, 1, 3);
+                       adev->ip_versions[UVD_HWIP][0] = IP_VERSION(2, 0, 3);
+               }
+               break;
        default:
                r = amdgpu_discovery_reg_base_init(adev);
                if (r) {